6
VC707 Evaluation Board
UG885 (v1.2) February 1, 2013
Chapter 1:
VC707 Evaluation Board Features
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Ethernet PHY SGMII interface (RJ-45 connector)
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PCI Express endpoint connectivity
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Gen1 8-lane (x8)
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Gen2 8-lane (x8)
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SFP+ Connector
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10/100/1000 tri-speed Ethernet PHY
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USB-to-UART bridge
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HDMI codec
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I
2
C bus
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I
2
C MUX
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I
2
C EEPROM (1 KB)
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USER I
2
C programmable LVDS oscillator
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DDR3 SODIMM socket
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HDMI codec
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FMC1 HPC connector
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FMC2 HPC connector
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SFP+ connector
•
I
2
C programmable jitter-attenuating precision clock multiplier
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Status LEDs
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Ethernet status
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Power good
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FPGA INIT
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FPGA DONE
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User I/O
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User LEDs (eight GPIO)
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User pushbuttons (five directional)
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CPU reset pushbutton
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User DIP switch (8-pole GPIO)
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User SMA GPIO connectors (one pair)
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LCD character display (16 characters x 2 lines)
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Switches
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Power on/off slide switch
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FPGA_PROB_B pushbutton
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Configuration mode DIP switch
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VITA 57.1 FMC1 HPC Connector
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VITA 57.1 FMC2 HPC Connector
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Power management
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PMBus voltage and current monitoring through TI power controller
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XADC header
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Configuration options
