Transmeta Crusoe TM5500, System Design Manual

Page: 11 / 130

July 17, 2002
11
Introduction and Naming Conventions
The following diagram shows how to locate the various schematic names:
1.3.1 Power Management Mode Terms
The power management modes supported by TM5500/TM5800 processors are discussed in detail in Chapter
1,
Functional Interface Description , in the Data Book . The following tables show the ACPI power and sleep
states supported by TM5500/TM5800 processors and referenced in this document .
Figure 1: Example Schematic Naming System
Table 1: Supported ACPI Processor States
ACPI State ACPI State Name Description
C0 Normal Active power state with processor executing instructions.
C1 Auto Halt Sleep state entered by processor executing HALT instruction.
C2 Quick Start Sleep state requiring chipset/hardware support. This state is lower
power than C1.
C3 Deep Sleep Sleep state requiring chipset/hardware support. This state is lower
power than C2.
Table 2: Supported ACPI System States
ACPI State ACPI State Name Description
S0 Working Normal active state (not sleeping).
S1 Power-on Suspend Processor not executing instructions. Processor state and RAM
context maintained.
S3 Suspend-to-RAM
(STR) Current processor state is suspended and stored in volatile RAM (that
is kept powered). Only _STR and _ALWAYS power supplies are
active.
pin name
ball number
schematic name