730CDT
3-25
This message is used to select the error dump operation when a data compare
error is detected.
4.
Select
1
or
2
and press
Enter
. The following message displays:
Detail status display (1:no,2:yes) ?
This message is used to select whether or not the HDD status is displayed on the
screen. The HDD status is described in Section 3.19.
5.
Select
1
or
2
and press
Enter
.
The Hard Disk Test message displays after you respond to the Detail Status
prompt.
6.
Select the number of the subtest you want to execute and press
Enter
. The
following message will appear during each subtest.
HARD DISK TEST
XXXXXXX
SUB-TEST : XX
PASS COUNT: XXXXX
ERROR COUNT: XXXXX
WRITE DATA: XX
READ DATA : XX
ADDRESS : XXXXXX
STATUS : XXX
The first three digits of the ADDRESS indicate which cylinder is being tested, the
fourth digit indicates the head, and the last two digits indicate the sector.
The first digit of the STATUS number indicates the drive being tested and the last
two digits indicate the error status code as explained in Table 3-2.
Subtest 01
Sequential Read
This subtest is a sequential reading of all the tracks on the HDD starting at
track 0. When all tracks have been read, the test starts at the maximum track
and reads the tracks on the HDD sequentially back to track 0.
Subtest 02
Address Uniqueness
This subtest writes unique address data to each sector of the HDD track-by-
track. The data written is then read and compared with the original data.
There are three ways the HDD can be read:
•
Forward sequential
•
Reverse sequential
•
Random
Subtest 03
Random Address/Data
This subtest writes random data to random addresses on the HDD cylinder,
head and sector. This data is then read and compared to the original data.
Summary of Contents for Tecra 730CDT
Page 1: ...TOSHIBA 730CDT PN 730 9400 CATM 3970294 B01 ...
Page 6: ...vi 730CDT ...
Page 10: ...1 4 730CDT Figure 1 1 730CDT personal computer Figure 1 2 730CDT system unit configuration ...
Page 190: ...4 60 730CDT ...
Page 196: ...B 2 730CDT B 2 System Board Back View Figure B 2 System board layout back ...
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