Program Memory
4-5
Memory and I/O Spaces
4.2
Program Memory
Program-memory space holds the code for applications; it can also hold table
information and constant operands. The program-memory space addresses
up to 64K 16-bit words. Every ’C2xx device contains a DARAM block B0 that
can be configured as program memory or data memory. Other on-chip pro-
gram memory may be SARAM and ROM or flash memory. For information on
configuring on-chip program-memory blocks, see Section 4.8.
4.2.1
Interfacing With External Program Memory
The ’C2xx can address up to 64K words of external program memory. While
the ’C2xx is accessing the on-chip program-memory blocks, the external
memory signals PS and STRB are in high impedance. The external buses are
active only when the ’C2xx is accessing locations within the address ranges
mapped to external memory. An active PS signal indicates that the external
buses are being used for program memory. Whenever the external buses are
active (when external memory or I/O space is being accessed) the ’C2xx
drives the STRB signal low.
For fast memory interfacing, it is important to select external memory with fast
access time. If fast memory is not available, or if speed is not a serious consid-
eration, you can use the the READY signal and/or the on-chip wait-state gen-
erator to create wait states.
Figure 4–1 shows an example of interfacing to external program memory. In
the figure, 8K
×
16-bit static memory is interfaced to the ’C2xx using two
8K
×
8-bit RAMs.
Obtain the Proper Timing Information
When interfacing memory with high-speed ’C2xx devices, refer to
the data sheet for that ’C2xx device for the required access, delay,
and hold times.
