Timer
8-12
Bit 4
TSS — Timer stop status bit. TSS stops or starts the timer. At reset, TSS
is cleared to 0 and the timer immediately starts.
TSS = 0
Starts or restarts the timer.
TSS = 1
Stops the timer.
Bits 3–0
TDDR — Timer divide-down register. Every (TDDR + 1) CLKOUT1 cycles,
the timer counter register (TIM) decrements by one. At reset, the TDDR bits
are cleared to 0. If you want to increase the overall timer count by an integer
factor, write this factor minus one to the four TDDR bits. When the prescaler
counter (PSC) value is 0, one CLKOUT1 cycle later, the contents of the
TDDR reload the PSC, and the TIM decrements by one. TDDR also reloads
the PSC whenever the timer reload bit (TRB) is set by software.
8.4.3
Timer Counter Register (TIM) and Timer Period Register (PRD)
These two registers work together to provide the current count of the timer:
-
The 16-bit timer counter register (TIM)
holds the current count of the tim-
er. The TIM decrements by one every (TDDR+1) CLKOUT1 cycles. When
the TIM decrements to zero, the TINT bit of the interrupt flag register (IFR)
is set (causing a pending timer interrupt), and a pulse is sent to the TOUT
pin.
You can write values from 1 to 65 535 (FFFFh) to this register. At reset, this
register is set to hold its maximum value of FFFFh. See Table 8–1 (page
8-2) for the address of this register.
-
The 16-bit timer period register (PRD) holds the next starting count for
the timer. When the TIM decrements to zero, in the following cycle, the
contents of the PRD are loaded into the TIM. The PRD contents are also
loaded into the TIM when you set the timer reload bit (TRB).
You can program the PRD to contain a value from 0 to 65 535 (FFFFh).
After reset, the PRD holds its maximum value of FFFFh. See Table 8–1
(page 8-2) for the address of this register. If you are not using the timer,
you can mask TINT and then use the PRD as a general-purpose data-
memory location.
You control the timer’s current and next periods. You can write to or read from
the TIM and PRD on any cycle. You can monitor and control the count by read-
ing from the TIM and writing the next counter period to the PRD without disturb-
ing the current timer count. The timer will start the next period after the current
count is complete. If you use TINT, you should program the PRD and TIM be-
fore unmasking TINT, to avoid unwanted interrupts.
Once a reset is initiated, the TIM begins to decrement only after reset is
deasserted.
