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Instruction Set Summary
2.3.4 Accumulator
ACC is the accumulator. This is the source and destination of most arithmetic instructions, data transfers,
and other instructions. The mnemonic for the accumulator (in instructions involving the accumulator) is A
instead of ACC.
ACC (0xE0)
–
Accumulator
Bit
Name
Reset
R/W
Description
7:0
ACC[7:0]
0x00
R/W
Accumulator
2.3.5 B Register
The B register is used as the second 8-bit argument during execution of multiply and divide instructions.
When not used for these purposes, it may be used as a scratchpad register to hold temporary data.
B (0xF0)
–
B Register
Bit
Name
Reset
R/W
Description
7:0
B[7:0]
0x00
R/W
B register. Used in MUL/DIV instructions
2.3.6 Stack Pointer
The stack resides in DATA memory space and grows upwards. The
PUSH
instruction first increments the
stack pointer (
SP
) and then copies the byte into the stack. The
SP
is initialized to 0x07 after a reset, and it
is incremented once to start from location 0x08, which is the first register (
R0
) of the second register bank.
Thus, in order to use more than one register bank, the
SP
should be initialized to a different location not
used for data storage.
SP (0x81)
–
Stack Pointer
Bit
Name
Reset
R/W
Description
7:0
SP[7:0]
0x07
R/W
Stack pointer
2.4
Instruction Set Summary
The 8051 instruction set is summarized in
. All mnemonics copyrighted
©
Intel Corporation,
1980.
The following conventions are used in the instruction set summary:
•
Rn
–
Register
R7–R0
of the currently selected register bank
•
Direct
–
8-bit internal data-location address. This can be DATA area (0x00
–
0x7F) or SFR area
(0x80
–
0xFF).
•
@Ri
–
8-bit internal data location, DATA area (0x00
–
0xFF) addressed indirectly through register
R1
or
R0
•
#data
–
8-bit constant included in instruction
•
#data16
–
16-bit constant included in instruction
•
addr16
–
16-bit destination address. Used by
LCALL
and
LJMP
. A branch can be anywhere within the
64-KB CODE memory space.
•
addr11
–
11-bit destination address. Used by
ACALL
and
AJMP
. The branch is within the same 2-KB
page of program memory as the first byte of the following instruction.
•
rel
–
Signed (2s-complement) 8-bit offset byte. Used by
SJMP
and all conditional jumps. Range is
–
128
to 127 bytes relative to first byte of the following instruction.
•
bit
–
Direct addressed bit in DATA area or SFR
39
SWRU191C
–
April 2009
–
Revised January 2012
8051 CPU
Copyright
©
2009
–
2012, Texas Instruments Incorporated