DE0-CV User Manual
33
www.terasic.com
May 4, 2015
Figure 3-16 Y-Cable for using keyboard and mouse simultaneously
Table 3-11 Pin Assignment of PS/2
Signal Name
FPGA Pin No.
Description
PS2_CLK
PIN_D3
PS/2 Clock
PS2_DAT
PIN_G2
PS/2 Data
PS2_CLK2
PIN_E2
PS/2 Clock (reserved for second PS/2 device)
PS2_DAT2
PIN_G1
PS/2 Data (reserved for second PS/2 device)
3
3
.
.
8
8
M
M
i
i
c
c
r
r
o
o
S
S
D
D
-
-
C
C
a
a
r
r
d
d
S
S
o
o
c
c
k
k
e
e
t
t
The development board supports Micro SD card interface using x4 data lines.
Figure 3-17
shows
the related signals connections between the SD Card and Cyclone V FPGA and
Figure 3-18
shows
micro SD card plug-in position.
Finally,
Table 3-12
lists all the associated pins.
Figure 3-17 Connection between the SD Card Socket and Cyclone V FPGA
