DE0-CV User Manual
6
www.terasic.com
May 4, 2015
64MB SDRAM, x16 bits data bus
C
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PS/2 mouse/keyboard
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2x20 GPIO Header
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Uses a 4-bit resistor-network DAC
With 15-pin high-density D-sub connector
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Provides SPI and 4-bit SD mode for Micro SD Card access
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,
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10 LEDs
10 Slide Switches
4 Debounced Push Buttons
1 CPU reset Push Buttons
Six 7-Segments
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5V DC input
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Figure 1-4
gives the block diagram of the board. To provide maximum flexibility for the user, all
connections are made through the Cyclone V FPGA device. Thus, the user can configure the FPGA
to implement any system design.
