Systran SCRAMNet+ VME3U, Hardware Reference Manual

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DESCRIPTION
Copyright 1995, S
YS
I
RAN
Corp. 3-9 VME3U H/W REFERENCE
If the Trigger 2 event is the frame counter, the timers in the ring effectively become
synchronized sub-frame timers, which can then be used to tag time-critical data or to
measure and compare the completion time of various tasks within a distributed real-time
system.
3.9 LED Status Indicators
INSERT LED
The green Insert LED is ON when the node is Inserted into the SCRAMNet
+
Network
ring.
CARRIER DETECT LED
The green Carrier Detect LED is ON when there is a valid pair of transmit lights from the
previous SCRAMNet
+
node into this node’s receiver pair. Assuming at least one node is
inserted in the ring, if the fiber optic cables are connected and the Carrier Detect LED is
OFF, then the ring integrity is NOT valid. This condition indicates improper fiber optic
cabling or problems with the down-line node's transmitter(s).
3.10 Modes of Operation
3.10.1 Data Filter Mode
When SCRAMNet
+
Data Filtering is enabled, only those WRITEs to SCRAMNet
+
memory that produce a data change are transmitted to the network.
EXAMPLE:
If location 1000 in SCRAMNet
+
memory contains the value ‘20’ and the host processor
writes the value ‘20’ to location 1000, then no network traffic will be generated.
However, if any other value is written to location 1000, then the new value will be passed
around the network to update the other SCRAMNet
+
node memories.
When a WRITE is received from the host, a comparison is made to the old data at that
address to see if there was a change before writing to shared memory. If the data has
changed, then it is written to shared memory and is also transmitted onto the network.
This entire process is completed within the host memory standard bus WRITE cycle.
Data filtering is a powerful communications compression technique for cyclical
applications. This technique has been shown to significantly reduce the network traffic
and therefore increase the effective throughput on the network.
3.10.2 High Performance (HIPRO) Mode
HIPRO provides an efficient means to transmit 8-bit and 16-bit data transactions as one
32-bit network WRITE. It also provides a means of keeping 32-bit data from becoming
fractured.
EXAMPLE #1:
A floating point length numeric sent in 8-bit or 16-bit pieces may not be accurately re-
assembled at the destination.