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DesignWare ARC AXC003 CPU Card User Guide
Default Boot-Mode Settings on the ARC SDP Mainboard
Synopsys, Inc.
Version 6323-018
May 2017
3.2 Default Boot-Mode Settings on the ARC SDP
Mainboard
The DIP switches on the ARC SDP Mainboard are set according to Figure 7.
All cores are configured to boot from the internal ROM and automatically start the pre-
bootloader application after reset. The pre-bootloader handles initialization of the system and
sets the CPU in the halt state.
Application loading from the SPI flash is bypassed.
If you want to start an ARC core manually, set bit 7 (boot start mode) to the right-side position.
In this case, the CPU delays code execution after reset until the corresponding
CPU Start
button on the ARC SDP Mainboard is pressed.
Default Settings of the DIP Switches on the ARC SDP Mainboard
SW2501
1
2
3
4
5
6
7
‘1’
‘0’
Boot Mirror Select
Bypass loading
Reserved
SW2503
1
3
4
5
6
7
‘1'
‘0’
Boot Core Select
Multi-core mode
8
Reserved
2
9
SW2502
1
2
3
4
5
6
7
‘1'
‘0’
Reserved
SW2401
1
3
4
5
6
7
‘1’
‘0’
For application
purposes
8
2
9
10
SW2504
SW2507
SW2506
SW2505
Start ARC HS
GPIO
EXT_PORTA[20]
Reserved
GPIO
EXT_PORTA[21]
Reserved
GPIO
EXT_PORTA[22]
Reserved
GPIO
EXT_PORTA[23]
Cache mode (HS34/HS36 only)
Boot start mode
Reserved