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A-7

Appendix A: Technical Specifications

Page Register

I/O Address (Hex)

DMA Channel 0

DMA Channel 1

DMA Channel 2

DMA Channel 3

DMA Channel 5

DMA Channel 6

DMA Channel 7

Refresh

Level

Function

NMI

System memory parity error or I/O channel check

IRQ0

System timer 0 output

IRQ1

Keyboard output buffer full

IRQ2

Interrupt from controller 2 (levels 8-15)

IRQ3

Serial port 2

IRQ4

Serial port 1

IRQ5

Parallel port 2

IRQ6

Floppy disk controller

IRQ7

Parallel port 1

IRQ8

Real-time clock

IRQ9

Reserved

IRQ10

Reserved

IRQ11

Reserved

IRQ12

Reserved

IRQ13

Coprocessor interrupt

IRQ14

Hard disk controller

IRQ15

Reserved

Table A-5. Page Register Addresses

Table A-6. Interrupt Controller

Summary of Contents for Super P6DNF

Page 1: ...SUPER Dual Pentium Pro Processor SUPER P6DNF Single Pentium Pro Processor SUPER P6SNF USER S MANUAL Revision 2 1...

Page 2: ...E PRODUCT INCLUDING THE COSTS OF THE REPAIRING REPLACING OR RECOVERING SUCH HARDWARE SOFTWARE OR DATA Copyright 1996 by SUPER P6DNF P6SNF All rights reserved Printed in the United States of America Un...

Page 3: ...errors on the data bus Manual Organization Chapter 1 Introduction describes the features specifications and performance of the SUPER P6DNF P6SNF system board provides detailed information about the ch...

Page 4: ...roubleshooting procedures for video memo ry and the setup configuration stored in memory Instructions are also included on contacting a technical assistance support repre sentative and returning merch...

Page 5: ...Chipset Overview 1 9 1 4 National Semiconductor 87306 1 10 1 5 Voltage Regulator Modules 1 10 1 6 System Overheat Thermal Control 1 11 1 7 Warranty Technical Support and Service 1 12 Parts 1 12 BIOS 1...

Page 6: ...nd Mouse Ports 2 10 Serial Ports 2 10 Back up Cooling Fan and Buzzer Connectors 2 11 2 6 Installing Removing the SIMM Modules 2 12 SIMM Module Installation 2 12 Removing SIMM Modules 2 13 2 7 Connecti...

Page 7: ...Table of Contents v i i...

Page 8: ...SUPER P6DNF P6SNF User s Manual v i i i...

Page 9: ...ry cache in the same package Having the L2 cache inside the package will not only save space it will also have the CPU core communicating with the L2 cache at full speed Non blocking means that the tr...

Page 10: ...ill enable an efficient transition to future processor generations and use with multiple processor architecture In addition to the security of a true standard PCI add on cards fea ture auto configurab...

Page 11: ...ter 1 Introduction Figure 1 1 shows the layout of the SUPER P6DNF motherboard Figure 1 2 shows the layout of the SUPER P6SNF motherboard Figure 1 3 shows the architecture of the SUPER P6DNF P6SNF moth...

Page 12: ...D LED JP91 1 1 JP92 1 JP93 1 JP90 JP29 JP30 JP31 JP32 1 1 1 1 1 1 JP37 JP36 JP42 1 U13 U5 1 1 JP26 JP27 1 J37 J38 J39 J40 1 1 J35 J36 USB1 USB2 PS 2 MOUSE J84 1 1 JP15 JP22 CPU Speed 150 166 180 200 J...

Page 13: ...1 JP92 1 JP93 1 JP90 JP29 JP30 JP31 JP32 1 1 1 1 1 1 JP37 JP36 JP42 1 U13 U5 1 1 JP26 JP27 J37 J38 J39 J40 1 1 J35 J36 USB1 USB2 PS 2 MOUSE J84 1 1 JP15 JP22 CPU Speed 150 166 180 200 JP29 OFF OFF ON...

Page 14: ...F User s Manual PCI Bus PCI PCI PCI ISA Bus ISA Figure 1 3 P6DNF P6SNF System Board Architecture Intel 440FX Chipset CPU 1 with 256 512KB L2 cache CPU 2 P6DNF with 256 512KB L2 cache PCI ISA ISA ISA 1...

Page 15: ...ache 387 pin ZIF Zero Insertion Force socket 8 Bus Speed 66 60 MHz external bus with 64 bit data plus 8 bits ECC Memory 64 bit wide data bus of up to 1GB Supports 1 MB 2 MB 4 MB 8MB 16MB and 32MB x32...

Page 16: ...p Plug and Play PnP with boot block support Software Compatibility 100 IBM PC AT compatible DOS OS 2 SCO UNIX Open Server XENIX Novell SMP Windows Windows NT and Windows 95 Testing 50 C 48 hour dynami...

Page 17: ...mini mum and 5 25 VDC maximum It is highly recommended that you use a high quality power supply Additionally in areas where noisy power transmission is present you may choose to install a line filter...

Page 18: ...uding level 2 support It includes a protection circuit against damage caused when the printer is pow ered up EPP mode provides for greater throughput than Compat ible or Extended modes by supporting f...

Page 19: ...ll then trigger the backup cooling fan or alarm The alarm can be turned on or off using JP88 JP90 is used to connect the overheat LED The user can set the temperature range using JP95 A buzzer can als...

Page 20: ...ear 12 months from the manufacturer s original invoice purchase date BIOS The manufacturer will exchange the BIOS free of charge shipping and handling excluded due to existing incompatibility issues w...

Page 21: ...next page to the equipment listed below Standard System Configuration 300 watt minimum 5V power supply for SUPER P6DNF 250 watt minimum 5V power supply for SUPER P6SNF Chassis with a speaker connecte...

Page 22: ...wing measures are generally sufficient to protect your equipment from static discharge Precautions Use a grounded wrist strap designed for static discharge Touch a grounded metal object before you rem...

Page 23: ...system board Refer to Figure 1 1 or Figure 1 2 for an illustration of the jumpers Manufac turing jumpers are permanently fixed or preset in place on the sys tem board You cannot move them These jumper...

Page 24: ...ON ON ON JP36 ON OFF ON OFF JP37 OFF ON OFF ON 2 4 Mounting the Motherboard in the Chassis The motherboard has eight standard mounting holes to fit all differ ent types of chassis Chassis may come wit...

Page 25: ...nnector Pin Definitions Power Supply Connectors Attach power supply cables to J20 for a 5V power supply or J21 for a 3 3V power supply optional for OEM customers only Do not force the cables but make...

Page 26: ...d Black wire to be connected 2 Ground Black wire to be connected 3 Ground Black wire to be connected 4 3 3 VCC 5 3 3 VCC 6 3 3 VCC 7 3 3 VCC 8 3 3 VCC 9 3 3 VCC 10 Ground Black wire to be connected 11...

Page 27: ...r pin definitions Table 2 4 Reset Pin Definitions Pin Number Definition 1 Reset 2 Ground Keylock Power LED Cable Connector The keylock power LED cable connector JP20 has five pins See Table 2 5 for pi...

Page 28: ...ve pins See Table 2 6 for pin definitions Table 2 6 Keyboard Connector Pin Definitions Thermal Control Connector Use the settings on Table 2 7 to set the system temperature condi tion for JP95 Once th...

Page 29: ...tion 1 Red wire speaker data 2 Key No connection 3 VCC Speaker data 4 GND Black wire Table 2 8 Hard Drive LED Pin Definitions Pin Number Function 1 Pull_Up_330 2 Key 3 HD Active 4 Pull_Up_330 Speaker...

Page 30: ...s located on J82 and J84 The cable for J84 can be obtained from the manu facturer See Table 2 10 for pin definitions Table 2 10 PS 2 Keyboard and Mouse Pin Definitions J82 and J83 Optional for OEM cus...

Page 31: ...zzer Connectors Connect the back up cooling fan to JP91 JP92 or JP93 and the buzzer to JP89 See Table 2 12 for pin definitions Table 2 12 Back up Cooling Fan and Buzzer Connectors Pin Definition Numbe...

Page 32: ...ain two 72 pin single sided or double sided SIMM modules Memory timing requires 60ns fast page devices Refer to Figure 2 1 and the instructions below for installing or re moving SIMM modules CAUTION E...

Page 33: ...Insert at an angle then snap upright into place Figure 2 1 Installing Removing a SIMM Memory Module Removing SIMM Modules 1 Remove SIMM modules in correct descending order from Bank 3 through Bank 0...

Page 34: ...SCSI ribbon cable with 50 wires A single IDE hard disk drive cable has two connectors to provide for two drives To select an IDE disk drive as C you would nor mally set the drive select jumper on the...

Page 35: ...10 GND 11 Data Bit 4 12 GND 13 Data Bit 5 14 GND 15 Data Bit 6 16 GND 17 Data Bit 7 18 GND 19 ACJ 20 GND 21 BUSY 22 GND 23 PE 24 GND 25 SLCT 26 NC Pin Pin Number Function Number Function Parallel Por...

Page 36: ...Pin Pin Number Function Number Function 1 GND 2 FDHDIN 3 GND 4 Reserved 5 Key 6 FDEDIN 7 GND 8 Index 9 GND 10 Motor Enable 11 GND 12 Drive Select B 13 GND 14 Drive Select A 15 GND 16 Motor Enable 17 G...

Page 37: ...GND 3 Host Data 7 4 Host Data 8 5 Host Data 6 6 Host Data 9 7 Host Data 5 8 Host Data 10 9 Host Data 4 10 Host Data 11 11 Host Data 3 12 Host Data 12 13 Host Data 2 14 Host Data 13 15 Host Data 1 16...

Page 38: ...2 18 SUPER P6DNF P6SNF User s Manual...

Page 39: ...your system If you have followed all of the procedures below and still need assistance refer to the Technical Support Procedures and or Returning Merchandise for Service section s in this chapter No V...

Page 40: ...Supply Power Supply OK Video Display Y 8 0 N Y Y Y N N Y Replace Motherboard Figure 3 1 Troubleshooting Flowchart 2 Check for missing jumpers or improper installation of the ROM BIOS 3 Make sure the v...

Page 41: ...1 MB x 36 SIMMs in Banks 0 3 Determine if different speeds of SIMMs have been installed in the same or different banks and the BIOS setup is configured for the fastest speed of RAM used It is recommen...

Page 42: ...er and date System configuration 3 3 Returning Merchandise for Service A receipt or copy of your invoice marked with the date of purchase is required before any warranty service will be rendered You c...

Page 43: ...3 5 Chapter 3 Troubleshooting...

Page 44: ...3 6 SUPER P6DNF P6SNF User s Manual...

Page 45: ...6 60 MHz external bus with 64 bit data plus 8 bits ECC Memory 64 bit wide data bus with 4 way interleaved memory of up to 1GB Supports 1 MB x 36 2 MB x 36 4 MB x 36 8MB x 36 16MB x 36 and 32MB x 36 60...

Page 46: ...lity in the future Advanced Power Management APM Green PC Function Plug and Play PnP with boot block support Shadowed Cached BIOS Shadowed system video BIOS Cached system video BIOS Software Compatibi...

Page 47: ...stem ROM BIOS expansion 00F0000 00FFFFF 64 KB System ROM BIOS 0100000 0FDFFFF 15232 KB Duplicates of System ROM BIOS expansion at 0E0000 0EFFFF 0FF0000 0FFFFFF 64 KB Extended memory 0000000 3FFFFFF 64...

Page 48: ...Page Register 00A0 00A1 SIO Interrupt Controller 2 00C0 00DE SIO DMA 2 00F0 Reset Numeric Error 0170 0177 Secondary IDE Channel 01F0 01F7 Primary IDE Channel 0278 027B Parallel Port 2 02F8 02FF On Bo...

Page 49: ...B25 A25 SA6 I O O DACK2 B26 A26 SA5 I O O T C B27 A27 SA4 I O O BALE B28 A28 SA3 I O Power 5 VDC B29 A29 SA2 I O O OSC B30 A30 SA1 I O Ground GND B31 A31 SA0 I O I MEMCS16 D1 C1 BHE I O I I OCS16 D2 C...

Page 50: ...ent word count C8 CH 2 base and current address CA CH 2 base and current word count CC CH 3 base and current address CE CH 3 base and current word count D0 Read Status Register Write Command Register...

Page 51: ...r I O channel check IRQ0 System timer 0 output IRQ1 Keyboard output buffer full IRQ2 Interrupt from controller 2 levels 8 15 IRQ3 Serial port 2 IRQ4 Serial port 1 IRQ5 Parallel port 2 IRQ6 Floppy disk...

Page 52: ...H Clock In 2 1 19 MHz Clock Out 2 Audio frequency to speaker Address Hex Description 00 0D Real time clock Hex Decimal Function 0 0 Seconds 1 1 Second alarm 2 2 Minutes 3 3 Minute alarm 4 4 Hours 5 5...

Page 53: ...yte 17 Expansion memory low byte 18 Expansion memory high byte 19 Fixed disk C extended byte for types 15 47 1A Fixed disk D extended byte for types 15 47 1B 2D Reserved 2E 2F CMOS RAM checksum 2 byte...

Page 54: ...A 10 SUPER P6DOF P6SOF User s Manual...

Page 55: ...SUPER Pentium Pro P6DNF P6SNF AMI BIOS REFERENCE MANUAL Revision 1 0...

Page 56: ...ECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES IN PARTICULAR THE VENDOR SHALL NOT H...

Page 57: ...ng Setup 2 1 Setup 2 1 1 Standard Setup 2 1 2 1 2 Advanced Setup 2 3 2 1 3 Chipset Setup 2 6 2 1 4 Power Management APM 2 9 2 1 5 PCI PnP Setup 2 12 2 1 6 Peripheral Setup 2 15 2 2 Security Setup 2 2...

Page 58: ...Appendix A Hard Disk Error Messages A 1 Appendix B BIOS Hard Disk Drive Types B 1 Appendix C BIOS Error Beep Codes C 1 Appendix D AMI BIOS POST Diagnostic Error Messages D 1 Appendix E BIOS Non Fatal...

Page 59: ...PRINTED IN U S A...

Page 60: ...WinBIOS is a high quality example of a system BIOS Configuration Data AT compatible systems also called ISA Industry Standard Architec ture must have a place to store system information when the compu...

Page 61: ...the screen below the copyright message 1 2 BIOS Features supports Plug and Play V1 0A supports Intel PCI 2 1 Peripheral Component Interconnect lo cal bus specification supports EDO Extended Data Out...

Page 62: ...plete successfully AMIBIOS System Configuration C 1985 1994 American Megatrends Inc Main Processor Pentium tm Pro Base Memory Size 640 KB Numeric Coprocessor Built In Ext Memory Size 31744 KB Floppy D...

Page 63: ...1 4 SUPER P6DNF P6SNF User s Manual...

Page 64: ...icon the following parameters are listed Type LBA Large Mode Block Mode 32Bit Mode and PIO Mode All param eters relate to IDE drives except Type If the hard disk drive to be configured is an IDE driv...

Page 65: ...inders in the disk drive Heads The number of heads Write The size of a sector gets progressively smaller as the track Precompensation diameter diminishes Yet each sector must still hold 512 bytes Writ...

Page 66: ...he settings are Disabled or Enabled The Optimal default setting is Enabled The Fail Safe default setting is Disabled Boot Up Sequence This option sets the sequence of boot drives either floppy drive A...

Page 67: ...VGA EGA CGA40x25 CGA80x25 Mono or Absent The Optimal and Fail Safe default settings are VGA EGA Password Check This option enables the password check option every time the sys tem boots or the end use...

Page 68: ...d WriteThru or WriteBack The Optimal and Fail Safe default settings are WriteBack System Bios Cacheable AMIBIOS always copies the system BIOS from ROM to RAM for faster execution Set this option to En...

Page 69: ...ns This option should be set according to the speed of the DRAM in the system The value of this option determines how the DRAM timings should be programmed in the chipset The settings for this option...

Page 70: ...ault settings are Enabled VGA Frame Buffer USWC USWC is a memory cycle type that stands for Uncacheable Specu lative Write Combining The settings are Disabled or Enabled The Optimal and Fail Safe defa...

Page 71: ...ages from the CPU to the PCI bus The settings are Disabled or Enabled The Optimal and Fail Safe default settings are Enabled PCI to DRAM Pipeline Set this option to Enabled to allow the PCI bridge to...

Page 72: ...APM Power Management APM Set this option to Enabled to enable the Intel 440FX power manage ment features and APM Advanced Power Management The set tings are Enabled Inst On instant on or Disabled The...

Page 73: ...The settings are Disabled Standby or Suspend The Optimal and Fail Safe default settings are Disabled Hard Disk Power Down Mode This option specifies the power conserving state that the hard disk driv...

Page 74: ...als The Optimal and Fail Safe default settings are Disabled Slow Clock Ratio This option specifies the speed at which the system clock runs in power saving states The settings are expressed as a ratio...

Page 75: ...ese options are Monitor or Ignore The Optimal and Fail Safe default settings are Ignore for all the above options 2 1 5 PCI PnP Setup Plug and Play Aware OS The settings for this option are Yes or No...

Page 76: ...read and written by the CPU is only directed to the PCI VGA device s palette registers If enabled data read and written by the CPU is directed to both the PCI VGA device s palette registers and the I...

Page 77: ...d INTA INTB INTC or INTD The Optimal and Fail Safe default settings are Disabled IRQ3 IRQ4 IRQ5 IRQ7 IRQ9 IRQ10 IRQ11 IRQ14 IRQ15 These options specify which bus the specified IRQ line is used on and...

Page 78: ...legacy ISA adapter cards The settings are C0000 C4000 C8000 CC000 D0000 D4000 D8000 or DC000 The Optimal and Fail Safe default settings are C8000 2 1 6 Peripheral Setup OnBoard FDC This option enables...

Page 79: ...ettings are Nor mal Bi Dir EPP or ECP The Optimal and Fail Safe default settings are Normal When set to Normal the normal parallel port mode is used Use Bi Dir to support bidirectional transfers Use E...

Page 80: ...AM You can enter a password by typing the password on the keyboard selecting each letter via the mouse or selecting each letter via the pen stylus Pen access must be customized for each specific hardw...

Page 81: ...ion in WinBIOS Setup contains two default settings a Fail Safe default and an Optimal default 2 4 1 Optimal Default The Optimal default settings provide optimum performance settings for all devices an...

Page 82: ...A 4 SUPER P6DNF P6SNF User s Manual...

Page 83: ...en to run the Hard Disk Utility 2 FATAL ERROR Bad Hard Disk The program is not getting a response from the hard disk or the hard disk is not repairable Check all cable and power connections to the har...

Page 84: ...ty Failed The program has sent a reset command to the controller followed by the drive parameters Using the parameters sent to it the controller is not getting a response from the hard disk drive Chec...

Page 85: ...as well 14 Seek Operation Failed The program has issued a seek command to the drive and this operation has failed A seek operation is the act of finding a particular sector on the hard disk 15 Attachm...

Page 86: ...A 4 SUPER P6DNF P6SNF User s Manual...

Page 87: ...855 17 35 MB 12 855 7 65535 855 17 50 MB 13 306 8 128 319 17 20 MB 14 733 7 65535 733 17 43 MB 16 612 4 0 663 17 20 MB 17 977 5 300 977 17 41 MB 18 977 7 65535 977 17 57 MB 19 1024 7 512 1023 17 60 MB...

Page 88: ...Precompensation Zone 37 615 8 128 615 17 41 MB 38 987 3 987 987 17 25 MB 39 987 7 987 987 17 57 MB 40 820 6 820 820 17 41 MB 41 977 5 977 977 17 41 MB 42 981 5 981 981 17 41 MB 43 830 7 512 831 17 48...

Page 89: ...ges normally appear on the screen See Appendix E for BIOS Error Messages Fatal errors are those which will not allow the system to continue the boot up procedure If a fatal error occurs you should con...

Page 90: ...board controller 8042 contains the Gate A20 switch which allows the CPU to operate in virtual mode This error means that the BIOS cannot switch the CPU into protected mode 7 Processor Exception The CP...

Page 91: ...CPU init and CPU data area init to be done next 07 Post code is uncompressed CPU init and CPU data area init to be done next 08 CPU and CPU data area init done CMOS checksum calculation to be done nex...

Page 92: ...ontroller command byte has been writ ten Issuing the keyboard controller pins 23 and 24 blocking and unblocking command next 11 Keyboard controller pins 23 and 24 have been blocked and unblocked See i...

Page 93: ...lization about to begin 25 Interrupt vector initialization done Going to read I O port of 8042 for turbo switch if any 26 Input port of 8042 is read Going to initialize global data for turbo switch 27...

Page 94: ...iled About to do alternate Display memory R W test 32 Alternate Display memory R W test passed About to look for the alternate display retrace checking 34 Video display checking over Display mode to b...

Page 95: ...base 640 KB memory 48 Patterns written in base memory Going to find out amount of memory below 1 MB memory 49 Amount of memory below 1 MB found and verified Go ing to find out amount of memory above...

Page 96: ...s line 57 The Gate A20 address line is disabled Adjusting the memory size depending the memory relocation and or shadowing parameters 58 The memory size has been adjusted for memory relo cation and or...

Page 97: ...cular buffer 83 Command byte written Global data initialization done About to check for lock key 84 Lock key checking over About to check for memory size mismatch with CMOS 85 Memory size check done A...

Page 98: ...ended memory sizes 96 Memory size adjusted due to mouse support hard disk type 47 Going to do any initialization before C8000 optional ROM control 97 Any initialization before C8000 optional control i...

Page 99: ...mand is issued Keyboard ID flag to be reset A1 Keyboard ID flag reset Cache memory test to follow A2 Cache memory test over Going to display any soft errors A3 Soft error display complete Going to set...

Page 100: ...o display the system configuration B0 The system configuration is displayed Uncompressing the Setup code for hotkey setup next if required B1 The setup code for hotkey has been uncompressed Copying an...

Page 101: ...nced CMOS Setup portion of the BIOS SETUP PROGRAM has been set to disabled the Fl prompt will not appear on the third line For most of the error messages there is no ERROR Message Line 2 Generally for...

Page 102: ...m 6 CMOS System Options Not Set The values stored in the CMOS are either corrupt or nonexistent Run the BIOS SETUP Program to correct this error 7 CMOS Display Type Mismatch The type of video stored i...

Page 103: ...ated Run the BIOS SETUP Program to correct this error 13 FDD Controller Failure The BIOS is not able to communicate with the floppy disk drive controller Check all appropriate connections after the sy...

Page 104: ...Error The Gate A20 portion of the keyboard controller 8042 has failed to operate correctly The 8042 chip should be replaced 22 Address Line Short An error has occurred in the address decoding circuit...

Page 105: ...n the system board The message will appear as follows ON BOARD PARITY ERROR ADDR HEX XXXX Where XXXX is the address in hexadecimal where the error has occurred On Board means that it is part of the me...

Page 106: ...31 Parity Error The BIOS has encountered a parity error with some memory in the system but it is not able to determine the address of the error Memory diagnostic software such as AMIDIAG can be used...

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