Silicon Laboratories EMBER EM358 series, Reference Manual, Page: 231 / 257

EM358x
Rev. 0.4 231
INL and DNL are referenced to a LSB of the Equivalent ADC Bits shown in the last row of Table 11-6. ENOB
(effective number of bits) can be calculated from either SNR (signal to non-harmonic noise ratio) or SINAD
(signal-to-noise and distortion ratio).
Table 11-9 lists other specifications for the ADC not covered in Table 11-6 and Table 11-7.
Table 11-9. ADC Specifications
Parameter Min. Typ. Max. Units
VREF 1.17 1.2 1.23 V
VREF output current 1 mA
VREF load capacitance 10 nF
External VREF voltage range 1.1 1.2 1.3 V
External VREF input impedance 1 MΩ
Minimum input voltage 0 V
Maximum input voltage VREF V
Single-ended signal range 0 VREF V
Differential signal range -VREF +VREF V
Common mode range 0 VREF V
Input referred ADC offset -10 10 mV
Input Impedance
1 MHz sample clock
6 MHz sample clock
Not sampling
1
0.5
10
MΩ
Note:
The signal-ended ADC measurements are limited in their range and only guaranteed for accuracy within
the limits shown in this table. The ADC's internal design allows for measurements outside of this range
(±200 mV), but the accuracy of such measurements is not guaranteed. The maximum input voltage is of
more interest to the differential sampling where a differential measurement might be small, but a common
mode can push the actual input voltage on one of the signals towards the upper voltage limit.