RZ/G1E
4. Pin Multiplexing
R01UH0544EJ0100 Rev.1.00
4-4
Sep 30,2016
DBSC3 (No.81 to 93): Single Function
Function 1
No. Module
During POR
Pin No. Pin Name
V(power)/|IOH|
I/O
Pull-up
81
DBSC3 Z
K22
M0DQ25 1.5/1.35V(VDDQ_M0)/-
IO(Z) -
82 DBSC3
Z
H22 M0DQ26
1.5/1.35V(VDDQ_M0)/-
IO(Z)
-
83
DBSC3 Z
L22
M0DQ27 1.5/1.35V(VDDQ_M0)/-
IO(Z) -
84 DBSC3
Z
J24 M0DQ28
1.5/1.35V(VDDQ_M0)/-
IO(Z)
-
85
DBSC3 Z
L24
M0DQ29 1.5/1.35V(VDDQ_M0)/-
IO(Z) -
86 DBSC3
Z
K24 M0DQ30
1.5/1.35V(VDDQ_M0)/-
IO(Z)
-
87
DBSC3 Z
L25
M0DQ31 1.5/1.35V(VDDQ_M0)/-
IO(Z) -
88 DBSC3
Z
*
H25 M0DQS3
1.5/1.35V(VDDQ_M0)/-
IO(Z
*
)
-
89
DBSC3 Z
*
J25
M0DQS3# 1.5/1.35V(VDDQ_M0)/-
IO(Z
*
) -
90 DBSC3
Z
J22 M0DM3
1.5/1.35V(VDDQ_M0)/-
O(Z)
-
91
DBSC3 P
J20
VDDQ_M0DPLL3 1.8V(VDDQ_M0DPLL3)/-
P -
92 DBSC3
P
H20 VSSQ_M0DPLL3
GND(VDDQ_M0DPLL3)/-
P
-
93
DBSC3 P
C7
VDDQ_M0BKUP 1.5/1.35V(VDDQ_M0BKUP)/-
P -
3/3 (DBSC3)
Note: No.88 and 89 (M0DQS3 and M0DQS3#) pin states during POR and default state:
The drivers output states are both high-impedance (Z), and the internal circuit controls pin levels as low-level for
the M0DQS3 pin and high-level for the M0DQS3# pin respectively.
Summary of Contents for RZ/G1E
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