Renesas RZ/G1E, User Manual

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RZ/G1E 1. Overview
R01UH0544EJ0100 Rev.1.00 1-21
Sep 30,2016
Item Description
Clock-synchronized
serial interface with
FIFO (MSIOF) 
3 channels

Max. speed: 26 Mbps

Internal 64-Byte transmit FIFOs/internal 256-Byte receive FIFOs

Supports master and slave modes

Internal prescaler

Supports serial formats: IIS, SPI (master and slave modes)

Interrupt request, DMAC request
Quad-SPI (QSPI) 
Single/Dual/Quad-SPI: serial slave transfer enabled

Supports master mode

SPCLK clock rate: 1…4080 in master mode; Max. 78 MHz
High-speed serial
communication
interface with FIFO
(HSCIF) 
3 channels

Asynchronous serial communication mode

Capable of full-duplex communication

On-chip baud rate generator, enabling any bit rate to be selected

Eight interrupt sources

DMA data transfer

Modem control functions (HRTS and HCTS) are stored.

The amount of data in the transmit/receive FIFO registers and the number of receive errors
in receive data in the receive FIFO register are available.

A receive data ready (DR) or a timeout error (TO) can be detected during reception.
PWM timer (PWM) 
7 channels

High-level width (10 bits) of PWM output can be set.

High-level periods (10 bits) of PWM can be set.

Periods in the range from two to 2
24
× 1024 cycles of the P
ϕ
clock can be set.

Continuous pulse or single pulse output selectable
Boot Function
(BOOT) 
System startup with selectable boot mode at power-on reset

Program downloaded to internal memory (LRAM)

Autorun function for the downloaded program