Renesas RZ/G1E, User Manual

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RZ/G1E 5. Pin Function Controller (PFC)
R01UH0544EJ0100 Rev.1.00 5-44
Sep 30,2016
5.3.25 Module Select Register 3 (MOD_SEL3)
Function: MOD_SEL3 selects the group for multiple LSI pins with multiplexed pin functions.
Each input or input/output signal of the SCIF and SSI is assigned to two or more groups of pins. Select one of these
groups when using these signals. Do not use the module pins in the unselected group; if a module pin in the unselected
group is used, correct operation is not guaranteed.
For some modules, however, although the output signals are assigned to two or more groups of pins, there is no bit for
selecting the group. Select one of these pins for each output signal through the corresponding peripheral function select
register. Also note that each pin can only be used in combination with the other input or input/output pins of the same
group. When ssi8 and ssi7 (in MOD_SEL3 register) are to be used simultaneously, the values of sel_ssi8[0] and
sel_ssi7[0] must be the same so that the selected pins belong to the same group. Correct operation is not guaranteed when
a pin is used in combination with pins from other groups.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
sel_scif
0[1]
sel_scif
0[0]
sel_scif
1[1]
sel_scif
1[0]
sel_scif
2[1]
sel_scif
2[0]
sel_scif
3[0]
sel_scif
4[2]
sel_scif
4[1]
sel_scif
4[0]
sel_scif
5[1]
sel_scif
5[0]
sel_ssi
1[0]
sel_ssi
2[0]
sel_ssi
4[0]
sel_ssi
5[0]
Initial value: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
sel_ssi
6[0]
sel_ssi
7[0]
sel_ssi
8[0]
sel_ssi
9[0]
— — — — — — — — — — — —
Initial value: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit Initial Value R/W Description
31 to 0 H'0000 0000 R/W These bits select multiplexed pin functions as indicated in the table
below.
Note: To enable this register to be set, appropriately set the multiplexed pin setting mask register (PMMR) immediately
before setting this register.
Bit Name
Function 1
(Set Value = H'0)
Function 2
(Set Value = H'1)
Function 3
(Set Value = H'2)
Function 4
(Set Value = H'3)
Function 5
(Set Value = H'4)
sel_scif0[1:0] + select pin EX_WAIT0 for
function SCIF_CLK + select pin
MMC_D6 for function
SCIF0_RXD + select pin
MMC_D7 for function
SCIF0_TX0 + select pin HSCIF0_HSCK for
function SCIF_CLK_B + select
pin VI0_HSYNC_N for function
SCIF0_RXD_B + select pin
VI0_VSYNC_N for function
SCIF0_TXD_B + select pin I2C0_SCL for
function SCIF0_RXD_C +
select pin I2C0_SDA for
function SCIF0_TXD_C + select pin HSCIF0_HCTS_N
for function SCIF0_RXD_D +
select pin HSCIF0_HRTS_N for
function SCIF0_TXD_D
sel_scif1[1:0] + select pin SCIF1_RXD for
function SCIF1_RXD + select
pin SCIF1_SCK for function
SCIF1_SCK + select pin
SCIF1_TXD for function
SCIF1_TXD + select pin SSI_SCK1 for
function SCIF1_RXD_B +
select pin SSI_SDATA8 for
function SCIF1_SCK_B +
select pin SSI_WS1 for function
SCIF1_TXD_B + select pin D10 for function
SCIF1_SCK_C + select pin
D11 for function SCIF1_RXD_C
+ select pin D12 for function
SCIF1_TXD_C
sel_scif2[2:0] + select pin SCIF2_RXD for
function SCIF2_RXD + select
pin SCIF2_SCK for function
SCIF2_SCK + select pin
SCIF2_TXD for function
SCIF2_TXD + select pin SSI_SCK9 for
function SCIF2_SCK_B +
select pin SSI_SDATA9 for
function SCIF2_TXD_B +
select pin SSI_WS9 for function
SCIF2_RXD_B + select pin ETH_REF_CLK for
function SCIF2_SCK_C +
select pin ETH_TXD1 for
function SCIF2_RXD_C +
select pin ETH_TX_EN for
function SCIF2_TXD_C
sel_scif3[0] + select pin SCIF3_RXD for
function SCIF3_RXD + select
pin SCIF3_SCK for function
SCIF3_SCK + select pin
SCIF3_TXD for function
SCIF3_TXD + select pin ETH_MAGIC for
function SCIF3_SCK_B +
select pin ETH_MDC for
function SCIF3_TXD_B +
select pin ETH_TXD0 for
function SCIF3_RXD_B
sel_scif4[2:0] + select pin I2C1_SCL for
function SCIF4_RXD + select
pin I2C1_SDA for function
SCIF4_TXD + select pin D5 for function
SCIF4_RXD_B + select pin D6
for function SCIF4_TXD_B + select pin EX_CS2_N for
function SCIF4_RXD_C +
select pin EX_CS3_N for
function SCIF4_TXD_C + select pin ETH_LINK for
function SCIF4_TXD_D +
select pin ETH_RXD1 for
function SCIF4_RXD_D + select pin A17 for function
SCIF4_RXD_E + select pin
A18 for function SCIF4_TXD_E