RZ/G1E
5. Pin Function Controller (PFC)
R01UH0544EJ0100 Rev.1.00
5-67
Sep 30,2016
5.4 Operation
5.4.1
Function Setting for Multiplexed Pins
Setting the LSI multiplexed pin setting mask register (PMMR) is necessary before setting each of the GPIO/peripheral
function select registers 0 to 6 (GPSR0 to GPSR6) and peripheral function select registers 0 to 13 (IPSR0 to IPSR13).
Specifically, the inverse of the value to be set in the select register must be written to the LSI multiplexed pin setting
mask register. Otherwise, the GPIO/peripheral function select registers 0 to 6 (GPSR0 to GPSR6) and peripheral function
select registers 0 to 13 (IPSR0 to IPSR13) cannot be set. IPSR0 to IPSR13, MOD_SEL, MOD_SEL2 and MOD_SEL3
registers shall be set before setting GPSR0 to GPSR6 registers in case that they need to be configured. MOD_SEL,
MOD_SEL2 and MOD_SEL3 registers can be set either earlier or later than setting IPSR0 to IPSR13 registers.
(1)
Procedure for changing pin function from GPIO to peripheral function
Set the LSI multiplexed pin setting mask register
Set the LSI multiplexed pin setting mask register
Set the GPIO/peripheral function select register
(GP) to peripheral function
Set the peripheral function select register (IP)
Clock (CP
φ
)
[Legend]
GP: GPIO/peripheral function select register bit
IP: Peripheral function select register bit
Pin
GP
0
GPIO
Peripheral function
Peripheral function select value
1
IP
Figure 5.1 Procedure for Changing Pin Function from GPIO to Peripheral Function
(2)
Procedure for changing pin function from peripheral function to GPIO
Set the LSI multiplexed pin setting mask register
Set the GPIO/peripheral function select register to GPIO
Clock (CP
φ
)
Pin
GP
1
GPIO
Peripheral function
Peripheral function select value
0
IP
[Legend]
GP: GPIO/peripheral function select register bit
IP: Peripheral function select register bit
Figure 5.2 Procedure for Changing Pin Function from Peripheral function to GPIO
Summary of Contents for RZ/G1E
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