C - 3
REVISION HISTORY
R8C/1A Group, R8C/1B Group Hardware Manual
1.00
Sep 09, 2005
222
Figure 16.46 Example of Register Setting in Master Transmit Mode
(Clock Synchronous Serial Mode);
‘ “
•
Set the IICSEL bit in the PMR register to “1” ’ added
227
Table 17.1 Performance of A/D Converter
• Analog Input Voltage: “0V to Vref”
→
“0V to AVCC” revised
• NOTE1: “When the analog input voltage ... FFh in 8-bit mode.” added
228
Figure 17.1 Block Diagram of A/D Converter;
“Vref”
→
“Vcom” revised
239
Table 18.1 Flash Memory Version Performance;
Program and Erase Endurance: (Program area)
→
(Program ROM),
(Data area)
→
(Data flash) revised
241
18.2 Memory Map;
“The user ROM ... area ... Block A and B.”
→
“The user ROM ... area (program ROM) ... Block A and B (data flash).”
revised
Figure 18.1 Flash Memory Block Diagram for R8C/1A Group revised
242
Figure 18.2 Flash Memory Block Diagram for R8C/1B Group revised
257
18.4.3.5 Block Erase
“The block erase command cannot ... program-suspend.” added
270
Table 19.3 A/D Converter Characteristics;
V
ref
and V
IA
: Standard value, NOTE4 revised
271
Table 19.4 Flash Memory (Program ROM) Electrical Characteristics;
NOTES3 and 5 revised, NOTE8 deleted
272
T
able 19.5 Flash Memory (Data flash Block A, Block B) Electrical
Characteristics;
NOTES1 and 3 revised
274
Table 19.8 Reset Circuit Electrical Characteristics (When Using Voltage
Monitor 1 Reset); NOTE2 revised
275
Table 19.10 High-speed On-Chip Oscillator Circuit Electrical
Characteristics;
“High-Speed On-Chip Oscillator ...”
→
“High-Speed On-Chip Oscillator Frequency ...” revised
NOTE2 added
282
Table 19.15 Electrical Characteristics (2) [Vcc = 5V];
NOTE1 deleted
286
Table 19.22 Electrical Characteristics (4) [Vcc = 3V];
NOTE1 deleted
293
20.3.1 Precautions on Timer X;
“When writing “1” (count starts) to ... writing “1” to the TXS bit.”
→
‘ “0” (count stops) can be read ... after the TXS bit is set to “1”.’ revised
20.3.2 Precautions on Timer Z;
“When writing “1” (count starts) to ... writing “1” to the TZS bit.”
→
‘ “0” (count stops) can be read ... after the TZS bit is set to “1”.’ revised
296
20.5.1.2 Selecting SSI Signal Pin added
302
21.Precautions on On-Chip Debugger; (1) added
Rev.
Date
Description
Page
Summary
