R8C/1A Group, R8C/1B Group
15. Serial Interface
Rev.1.30
Dec 08, 2006
Page 166 of 315
REJ09B0252-0130
Figure 15.11
Receive Timing in UART Mode
15.2.1
CNTR0 Pin Select Function
The CNTRSEL bit in the UCON register selects whether P1_7 is used as the CNTR00/INT10 input pin or P1_5
is used as the CNTR01/INT11 input pin.
When the CNTRSEL bit is set to 0, P1_7 is used as the CNTR00/INT10 pin and when the CNTRSEL bit is set
to 1, P1_5 is used as the CNTR01/INT11 pin.
UiBRG output
Set to 0 when interrupt request is accepted, or set by a program
• Example of receive timing when transfer data is 8 bits long (parity disabled, one stop bit)
The above timing diagram applies when the register bits are set as follows:
• PRYE bit in UiMR register = 0 (parity disabled)
• STPS bit in UiMR register = 0 (1 stop bit)
i = 0 or 1
UiC1 register
RE bit
Start bit
Stop bit
D0
D1
D7
RXDi
Transfer clock
Determined to be “L” Receive data taken in
Reception triggered when transfer clock
is generated by falling edge of start bit
Transferred from UARTi receive
register to UiRB register
UiC1 register
RI bit
SiRIC register
IR bit
1
0
1
0
1
0
