Qorivva MPC5xxx/SPC5xx Debugger and NEXUS Trace
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©1989-2021 Lauterbach GmbH
You can see the currently set breakpoints with the command
If no more on-chip breakpoints are available you will get an error message when trying to set a new on-chip
breakpoint.
Breakpoints on Program Addresses
The debugger sets software and on-chip breakpoints to the effective address. If a breakpoint is set on a
program address, the debugger will first try to set a software breakpoint. If writing the software breakpoint
fails (translation error or bus error), then an on-chip breakpoint will be set instead. If a memory range must
e200z1
e200z3
e200z6
e200z650
e200z750
4 instruction
2 read/write
2 counters
4 single
breakpoints
-- or --
2 breakpoint
ranges
2 single
breakpoints
-- or --
1 breakpoint
range
none
e200z335
4 instruction
2 read/write
2 data value
2 counters
4 single
breakpoints
-- or --
2 breakpoint
ranges
2 single
breakpoints
-- or --
1 breakpoint
range
2 single
breakpoints
(associated
with data
address BPs)
e200z446
e200z4d
e200z760
8 instruction
2 read/write
2 data value
2 counters
8 single
breakpoints
-- or --
2 breakpoint
ranges and
4 single
breakpoints
2 single
breakpoints
-- or --
1 breakpoint
range
2 single
breakpoints
(associated
with data
address BPs)
e200z210
e200z215
e200z225
e200z420
e200z425
e200z720
e200z4201
e200z4203
e200z4204
e200z4251
e200z7260
8 instruction
4 read/write
2 data value
no counters
8 single
breakpoints
-- or --
4 breakpoint
ranges
4 single
breakpoints
-- or --
2 breakpoint
ranges
2 single
breakpoints
(associated
with data
address BPs)
Core type:
On-chip
Breakpoints
Instruction
Address
Breakpoints
Data Address
Breakpoints
Data Value
Breakpoints
