![Qorivva MPC5 Series Manual Download Page 131](http://html1.mh-extra.com/html/qorivva/mpc5-series/mpc5-series_manual_3255432131.webp)
Qorivva MPC5xxx/SPC5xx Debugger and NEXUS Trace
131
©1989-2021 Lauterbach GmbH
NEXUS.CLIENT<x>.SELECT
Select a nexus client for data tracing
Select the trace client for data tracing. For processors with dedicated trace clients (e.g. MPC5554), any trace
client can be assigned to any CLIENT field.
For processors with SRAM port sniffers (e.g. MPC564xL), the port sniffers are fix assigned to CLIENT fields
(NXSS0 -> CLIENT1, NXSS1 -> CLIENT2) and
<client>
configures the source selector of the SRAM port
sniffer.
NEXUS.CLIENT3.SPTACQMASTER
Trace individual SPT masters
MPC577xK only. If set to OFF (default), the processor sends messages if all SPT acquisition accesses. If set
to a specific master ID, only the ID of this master is traced.
NEXUS.CoreENable
Enable core tracing for dedicated cores in SMP
Core tracing is enabled for all core of an SMP system by default. The command
NEXUS.CoreENable
allows
to enable core tracing for only the logical cores specified.
The
of the TRACE32 state line shows you the list of logical cores that form the SMP system.
Format:
NEXUS.CLIENT1.SELECT
<client>
NEXUS.CLIENT2.SELECT
<client>
NEXUS.CLIENT3.SELECT
<client>
<client>
:
(dedicated trace clients, e.g. MPC5554, MPC5674F)
DMA_0
|
DMA_1
|
FLEXRAY
(source selector for SRAM port sniffers, e.g. MPC564xL, MPC567xK)
ALL
|
CORE
|
NEXCORE
|
DMA_0
|
DMA_1
Format:
NEXUS.CLIENT3.SPTACQMASTER OFF
|
<master_id>
Format:
NEXUS.CoreENable
{
<logical_core>
}
NEXUS.CoreENable 1.
; Enable core tracing only for
; the logical core 1. of the SMP
; system