CHAPTER 4 I
2
C COMMUNICATIONS
User’s Manual U18438EJ2V0UD
53
(e) Stop
condition
When the SCL pin is at high level (when serial transfer has been completed and a serial clock has not been
output), changing the SDA pin from low level to high level generates a stop condition.
A stop condition is a signal that the master device outputs to the slave device when serial transfer has been
completed.
Figure 4-6. Stop Condition
SCL
SDA
H
4.2.2 Status transition diagram
Figure 4-7 shows the status transition diagram.
Figure 4-7. Shift Register Operation
RESET
Status 4
Wait for WD/RST
Status 6
Wait for ID (R)
Status 7
Wait for RD
Status 3
Wait for AD
Status 2
Wait for ID (W)
Status 5
Wait for WD/SP
Status 8
Wait for ACK/NACK
Status 1
Wait for ST/SP
Status 9
Wait for SP
SP detected
ST
detected
ID
reception
AD
reception
ACK reception
NACK reception
RD transmission
WD reception
WD reception
SP detected
SP detected
RST
detected
ID
reception