CHAPTER 5 ELECTRICAL SPECIFICATIONS
User’s Manual U18438EJ2V0UD
65
(2) Internal voltage boosting method (1.8 V
≤
LV
DD
≤
5.5 V)
Parameter Symbol
Conditions
MIN.
TYP.
MAX.
Unit
CTSEL1 = 0,
CTSEL0 = 1
1.35 1.43 1.51 V
CTSEL1 = 0,
CTSEL0 = 0
1.42 1.50 1.58 V
CTSEL1 = 1,
CTSEL0 = 1
1.48 1.57 1.66 V
GAIN = 0
CTSEL1 = 1,
CTSEL0 = 0
1.54
Note 3
1.63
Note 3
1.72
Note 3
V
CTSEL1 = 0,
CTSEL0 = 1
0.87 0.93 1.00 V
CTSEL1 = 0,
CTSEL0 = 0
0.94 1.00 1.06 V
CTSEL1 = 1,
CTSEL0 = 1
1.00 1.07 1.14 V
LCD output voltage variation range V
LCD2
C1 to C4
Note 1
= 0.47
µ
F
Note 2
GAIN = 1
CTSEL1 = 1,
CTSEL0 = 0
1.06 1.13 1.20 V
Doubler output voltage
V
LCD1
C1 to C4
Note 1
= 0.47
µ
F
Note 2
2
V
LCD2
V
Tripler output voltage
V
LCD0
C1 to C4
Note 1
= 0.47
µ
F
Note 2
3
V
LCD2
V
4.5 V
≤
LV
DD
≤
5.5 V
4
s
GAIN = 1
1.8 V
≤
LV
DD
< 4.5 V
0.5
s
Voltage boost wait time
Note 4
t
VAWAIT
GAIN = 0
0.5
s
LCD output resistor
Note 5
(Common) R
ODC
40 k
Ω
LCD output resistor
Note 5
(Segment) R
ODS
200 k
Ω
Notes 1.
This is a capacitor that is connected between voltage pins used to drive the LCD.
C1: A capacitor connected between CAPH and CAPL
C2: A capacitor connected between V
LC0
and GND
C3: A capacitor connected between V
LC1
and GND
C4: A capacitor connected between V
LC2
and GND
2.
When the frame frequency is 128 Hz or lower, the SEG and COM pins are left open, and (LCDON, SCOC,
VLCON) = 111B.
3.
When operating voltage range is 2.0 V
≤
LV
DD
< 5.5 V.
4.
This is the wait time from when voltage boosting is started (VLCON = 1) until display is enabled
(LCDON = 1).
5.
The output resistor is a resistor connected between one of the V
LC0
, V
LC1
, V
LC2
and LV
SS
pins, and either of
the SEG and COM pins.