271
CHAPTER 11 WATCH TIMER
11.3 Watch Timer Control Registers
The following two types of registers are used to control the watch timer.
• Timer clock select register 2 (TCL2)
• Watch timer mode control register (TMC2)
(1) Timer clock select register 2 (TCL2)
This register sets the watch timer count clock.
TCL2 is set with an 8-bit memory manipulation instruction.
RESET input sets TCL2 to 00H.
Remark
Besides setting the watch timer count clock, TCL2 sets the watchdog timer count clock and buzzer
output frequency.
Figure 11-1. Watch Timer Block Diagram
Selector
TMC21
Prescaler
Selector
Selector
Selector
INTWT
5-Bit Counter
f
W
2
14
f
W
2
13
INTTM3
To 16-Bit
Timer/Event
Counter
Watch Timer Mode Control Register
TMC26 TMC25 TMC24 TMC23 TMC22 TMC21 TMC20
Internal Bus
TCL24
Timer Clock Select Register 2
f
W
2
4
f
W
2
5
f
W
2
6
f
W
2
7
f
W
2
8
f
W
2
9
f
W
f
XX
/2
7
f
XT
Clear
Clear
3
Summary of Contents for PD78076
Page 2: ...2 MEMO ...
Page 12: ...12 MEMO ...
Page 48: ...48 MEMO ...
Page 64: ...64 MEMO ...
Page 82: ...82 MEMO ...
Page 100: ...100 MEMO ...
Page 130: ...130 MEMO ...
Page 180: ...180 MEMO ...
Page 222: ...222 MEMO ...
Page 248: ...248 MEMO ...
Page 288: ...288 MEMO ...
Page 308: ...308 MEMO ...
Page 364: ...364 MEMO ...
Page 494: ...494 MEMO ...
Page 526: ...526 MEMO ...
Page 544: ...544 MEMO ...
Page 558: ...558 MEMO ...
Page 580: ...580 MEMO ...
Page 596: ...596 MEMO ...
Page 598: ...598 MEMO ...
Page 626: ...626 MEMO ...