105
CHAPTER 5 CPU ARCHITECTURE
(1) Vector table area
The 64-byte area 0000H to 003FH is reserved as a vector table area. The RESET input and program start
addresses for branch upon generation of each interrupt request are stored in the vector table area. Of the
16-bit address, low-order 8 bits are stored at even addresses and high-order 8 bits are stored at odd
addresses.
Table 5-2. Vector Table
Vector Table Address
Interrupt Request
0000H
RESET input
0004H
INTWDT
0006H
INTP0
0008H
INTP1
000AH
INTP2
000CH
INTP3
000EH
INTP4
0010H
INTP5
0012H
INTP6
0014H
INTCSI0
0016H
INTCSI1
0018H
INTSER
001AH
INTSR/INTCSI2
001CH
INTST
001EH
INTTM3
0020H
INTTM00
0022H
INTTM01
0024H
INTTM1
0026H
INTTM2
0028H
INTAD
002AH
INTTM5
002CH
INTTM6
003EH
BRK
(2) CALLT instruction table area
The 64-byte area 0040H to 007FH can store the subroutine entry address of a 1-byte call instruction (CALLT).
(3) CALLF instruction entry area
The area 0800H to 0FFFH can perform a direct subroutine call with a 2-byte call instruction (CALLF).
Summary of Contents for PD78076
Page 2: ...2 MEMO ...
Page 12: ...12 MEMO ...
Page 48: ...48 MEMO ...
Page 64: ...64 MEMO ...
Page 82: ...82 MEMO ...
Page 100: ...100 MEMO ...
Page 130: ...130 MEMO ...
Page 180: ...180 MEMO ...
Page 222: ...222 MEMO ...
Page 248: ...248 MEMO ...
Page 288: ...288 MEMO ...
Page 308: ...308 MEMO ...
Page 364: ...364 MEMO ...
Page 494: ...494 MEMO ...
Page 526: ...526 MEMO ...
Page 544: ...544 MEMO ...
Page 558: ...558 MEMO ...
Page 580: ...580 MEMO ...
Page 596: ...596 MEMO ...
Page 598: ...598 MEMO ...
Page 626: ...626 MEMO ...