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CHAPTER 3 CPU ARCHITECTURE
Preliminary User’s Manual U13420EJ2V0UM00
Figure 3-4. Data Memory Addressing (
µ
PD78F0066)
0000H
General registers
32
×
8 bits
Flash memory
49152
×
8 bits
External memory
10240
×
8 bits
C000H
BFFFH
E7FFH
FEE0H
FEDFH
FF00H
FEFFH
FFFFH
Internal high-speed RAM
1024
×
8 bits
FB00H
FF20H
FF1FH
FE20H
FE1FH
Special function
registers (SFRs)
256
×
8 bits
SFR addressing
Register addressing
Short direct
addressing
Direct addressing
Register indirect
addressing
Based addressing
Based indexed
addressing
Reserved
Internal buffer RAM
32
×
8 bits
Reserved
Internal expansion RAM
4096
×
8 bits
E800H
FAE0H
FADFH
FAC0H
FABFH
F800H
F7FFH
FAFFH
Summary of Contents for mPD780065 Series
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