NEC mPD780065 Series, Preliminary User'S Manual

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CHAPTER 10 CLOCK OUTPUT CONTROL CIRCUITS
Preliminary User’s Manual U13420EJ2V0UM00
10.2 Clock Output Control Circuit Configuration
The clock output control circuits consists of the following hardware.
Table 10-1. Configuration of Clock Output Control Circuits
Item Configuration
Control register Clock output select register (CKS)
Port mode register (PM7)
Note
Note See Block Diagram of Figure 4-8. P70 to P73, P75.
10.3 Register to Control Clock Output Control Circuit
The following two types of registers are used to control the clock output control circuits.
• Clock output select register (CKS)
• Port mode register (PM7)
(1) Clock output select register (CKS)
This register sets output enable/disable for clock output (PCL) and sets the output clock.
CKS is set with a 1-bit or 8-bit memory manipulation instruction.
RESET input sets CKS to 00H.