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12 Testing mode, parameter reset
12.1 Synchronisation test
The synchronisation signal receive process can be displayed in special testing mode.
This can be useful for example when the problems with the DCF signal receipt appear.
Display description during synchronisation test mode:
Two digits on the left side show the current DCF bit number (goes up from 0 to 58).
Third digit show the type of current DCF bit (0 or 1). The last digit shows the number of
successfully received DCF telegrams. The colon indicates that the DCF bit is currently
received. The dot behind the last digit signalizes synchronised clock.
Entering the synchronisation test mode:
•
Enter the clock menu, move to the software version item by several pushes of the
PB1S
on the control PCB or
>>
on IR
.
•
Keep pushing both buttons on control PCB simultaneously or button DISP on IR
until the display shows C0:00
•
Use the PB2 or + button on IR to set the value behind the colon to 03
•
Keep pushing simultaneously both clock PCB buttons or the DISP button on IR, until
the display shows synchronisation information
12.2 Parameter reset
If necessary, the clock parameters can be set to factory defaults by the following
procedure.
Activating the parameter reset:
•
Enter the clock menu, move to the software version item by several pushes of the
PB1S on the control PCB or >> on IR.
•
Keep pushing both buttons on control PCB simultaneously or button DISP on IR
until the display shows C0:00
•
Using the PB2 or + button on IR set the value behind the colon to 04
•
Keep pushing simultaneously both clock PCB buttons or the DISP button on IR, until
the display shows FAC1 and clock makes reset
