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17
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Rev.1.0
17.1 External Bus Interface Related Signals
The 32172/32173 has the signals listed below that are associated with the external bus interface.
These signals can be used in external extended mode or processor mode.
(1) Address
The external bus interface outputs 19-bit address (A12-A30) for addressing a 1-Mbyte space.
The least significant A31 is not output. In an external write cycle, the external bus interface
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outputs the BHW and BLW signals to indicate the valid byte position on the 16-bit data bus at
which to write data. In a read cycle, data is read always in 16 bits and the data at only the valid
byte position is transferred.
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Note: During external extended mode, the A12 and A13 pins are shared with the CS2 and CS3
pins, respectively. Therefore, functions of these pins must be selected with the Port P4
and P22 Peripheral Output Select Register. (In processor mode, these pins always
function as A12 and A13.)
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(2) Chip selects (CS0, CS1, CS2, and CS3)
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These signals are output in external extended mode or processor mode. The CS0, CS1, CS2,
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and CS3 signals each indicate one of the external extended areas spaced every 2 Mbytes.
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The CS0 signal points to a 2-Mbyte area when in processor mode or a 1-Mbyte area when in
external extended mode. (For details, see Chapter 3, "Address Space.")
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Note: During external extended mode, the A12 and A13 pins are shared with the CS2 and CS3
pins, respectively. Therefore, functions of these pins must be selected with the Port P4
and P22 Peripheral Output Select Register. (In processor mode, these pins always
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function as A12 and A13, so that the CS2 and CS3 signals are not output.)
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(3) Read strobe (RD)
This signal is output during an external read cycle, indicating the timing at which to read data.
This signal is driven high when writing to the bus or accessing the internal function.
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(4) Byte high write/byte high enable (BHW/BHE)
The pin function is changed using the Bus Mode Control Register (BUSMODC).
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When BUSMOD = 0, Byte High Write (BHW) is selected, indicating that valid data is transferred
on the upper byte side (DB0-DB7) of the data bus during external write access. This output is
held high during external read and when accessing an internal function.
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When BUSMOD = 1, Byte High Enable (BHE) is selected, indicating that valid data is transferred
on the upper byte side (DB0-DB7) of the data bus during external access. This output is held high
when accessing an internal function.
EXTERNAL BUS INTERFACE
17.1 External Bus Interface Related Signals
Summary of Contents for 32172
Page 20: ... This is a blank page 16 ...
Page 21: ...1 1 Overview 1 2 Block Diagram 1 3 Pin Functions 1 4 Pin Layout CHAPTER 1 CHAPTER 1 OVERVIEW ...
Page 44: ...1 1 24 Rev 1 0 This is a blank page Overview 1 4 Pin Layout ...
Page 58: ...2 2 14 Rev 1 0 This is a blank page CPU 2 6 Data Formats ...
Page 122: ...4 4 26 Rev 1 0 This is a blank page EIT 4 13 Precautions on EIT ...
Page 200: ...7 7 6 Rev 1 0 This is a blank page RESET 7 4 Precautions to Be Taken Immediately after Reset ...
Page 298: ...9 9 58 Rev 1 0 This is a blank page DMAC 9 4 Precautions on Using DMAC ...
Page 776: ...19 19 10 Rev 1 0 RAM BACKUP MODE 19 4 Exiting RAM Backup Mode Wakeup This is a blank page ...
Page 782: ...20 20 6 Rev 1 0 OSCILLATION CIRCUIT 20 2 Clock Generator Circuit This is a blank page ...
Page 856: ...23 23 26 Rev 1 0 This is a blank page ELECTRICAL CHARACTERISTICS 23 6 AC Characteristics ...
Page 857: ...24 1 A D Conversion Characteristics CHAPTER 24 CHAPTER 24 STANDARD CHARACTERISTICS ...
Page 859: ...Appendix 1 1 Dimensional Outline Drawing APPENDIX 1 APPENDIX 1 MECHANICAL SPECIFICATIONS ...
Page 865: ...Appendix 3 1 Precautions about Noise APPENDIX 3 APPENDIX 3 PRECAUTIONS ABOUT NOISE ...