LSI LSI53C895A, Technical Manual

Page: 218 / 364

4-110 Registers
memory with the exception of a possible byte in the
SWIDE register. That byte must be flushed to memory
manually in SCRIPTS.
In the case of a SCSI data send, this byte count will
reflect all data sent out onto the SCSI bus. Any data left
in the part from the phase mismatch will be ignored and
automatically cleared from the FIFOs.
Registers: 0xCC–0xCF
Updated Address (UA)
Read/Write
UA Updated Address [31:0]
This register will contain the updated data address for the
BMOV that was executing when the phase mismatch
occurred.
In the case of a SCSI data receive, if there is a byte in
the
SCSI Wide Residue (SWIDE) register then this
address will point to the location where that byte must be
stored. The SWIDE byte must be manually written to
memory and this address must be incremented prior to
updating any scatter/gather entry.
In the case of a SCSI data receive, if there is not a byte
in the SWIDE register then this address will be the next
location that should be written to when this I/O restarts.
No manual flushing will be necessary.
In the case of a SCSI data send, all data sent to the SCSI
bus will be accounted for and any data left in the part will
be ignored and will be automatically cleared from the
FIFOs.
31 0
UA
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0