4-66
Registers
the SCRIPT is written to this register, SCRIPTS are
automatically fetched and executed until an interrupt
condition occurs.
In single step mode, there is a single step interrupt after
each instruction is executed. The
register does not need to be written with the next
address, but the Start DMA bit (bit 2,
register) must be set each time the step
interrupt occurs to fetch and execute the next SCRIPTS
command. When writing this register eight bits at a time,
writing the upper eight bits begins execution of SCSI
=
SCRIPTS. The default value of this register is zero.
Registers: 0x30–0x33
DMA SCRIPTS Pointer Save (DSPS)
Read/Write
DSPS
DMA SCRIPTS Pointer Save
[31:0]
This register contains the second Dword of a SCRIPTS
instruction. It is overwritten each time a SCRIPTS
instruction is fetched. When a SCRIPTS interrupt
instruction is executed, this register holds the interrupt
vector. The power-up value of this register is
indeterminate.
31
0
DSPS
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
Summary of Contents for LSI53C895A
Page 6: ...vi Preface...
Page 16: ...xvi Contents...
Page 222: ...4 114 Registers...
Page 260: ...5 38 SCSI SCRIPTS Instruction Set...
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