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Keysight M8131A 16/32 GSa/s Digitizer User’s Guide
4
Remote Programming
Sample Clock Status Subsystem
The Sample Clock Status register contains the status of the 8 GHz clock
signal connected to the Sample Clk In.
The following SCPI commands and queries are supported:
:STATus:QUEStionable:SCLock[:EVENt]?
:STATus:QUEStionable:SCLock:CONDition?
:STATus:QUEStionable:SCLock:ENABle[?]
:STATus:QUEStionable:SCLock:NTRansition[?]
:STATus:QUEStionable:SCLock:PTRansition[?]
Table 13
Sample clock status register
Bit Number
Decimal Value
Definition
0
Sample Clock invalid
1
No sample clock signal is connected to Sample Clk
In, or the connected sample clock is invalid and
cannot be used, because its amplitude or frequency
is out-of-range.
