JAI PULNiX TM-4100GE, Operation Manual

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Page 49
Operation
TM-4100GE Hardware
FIGURE 33.
Read-Out Inhibit
8.7 Dynamic Range Control
The typical interline transfer CCD has fixed noise levels based on dark current (thermal or KT noise),
pattern noise, and the operating clock speed. In general, the level of the 40 MHz pixel clock CCD at
room temperature is around 20 to 30 electrons. The maximum capacity of CCD charges is limited by
the well capacity at saturation. The range is limited by the structure and the pixel size.
The TM-4100GE uses a CCD with 7.4 µm x 7.4 µm pixel and two-phase vertical shift register structure.
The well capacity is 40,000 electrons. The theoretical dynamic range is 40,000:30 = 1333:1 (60 dB).
VINIT (External Pulse Width Control Trigger)
No-Delay Shutter (All cameras)
No-delay Exposure
Discharge
Transfer Gate
ROI Control: Camera #1
Camera #1 Video
ROI Control: Camera #2
Camera #2 Video
ROI pulse width: Min. 1H to 1frame
Max. 1H delay
FDV/Vsync
0
20
40
100
60
120
80
0
200
400
600
FL
Lens: F=5.6
Vsub = 10 V
Vsub = 12 V
Vsub = 14 V
Vsub = 16 V
Vsub = 18 V
CCD OUTPUT VOLTAGE
LUMINANCE
Blooming adj. = 13. 5 V
Digital saturation at 16 dB amp
Analog saturation at 20 dB amp
Max. Digital dynamic range at 3 dB amp
140 160
mV
Vsub = 8 V