Intel® PXA27x Processor Family
Optimization Guide
3-11
System Level Optimization
bandwidth and hence an application could potentially run faster in a system with a smaller LCD
display or a display with a lower refresh rate. Also, DMA channels can influence the performance
of applications. This section describes how different sub-systems can be optimized for improving
system performance.
3.5.1
LCD Controller Optimization
The LCD controller provides an interface between the PXA27x processor and a LCD module. The
LCD module can be passive (STN), active (TFT), or an LCD panel with internal frame buffering.
3.5.1.1
Bandwidth and Latency Requirements for LCD
The LCD controller may have up to 7 DMA channels running depending on the mode of operation.
Therefore the LCD can potentially consume the majority of the bus bandwidth when used with
large panels. Bandwidth requirements for each plane (that is: base, overlay1, overlay 2, etc.) must
be considered when determining LCD bandwidth requirements. The formula for each plane is:
Length and width are the number of lines per panel and pixels per line, respectively. Refresh rate is
in frames per second. BPP is bits per pixel in physical memory, that is: 16 for 16 BPP, 32 for 18
BPP unpacked, 24 for 18 BPP packed (refer to the
Intel® PXA27x Processor Family Developer’s
Manual
for more info).
Depending on where the overlay planes are placed, there might be variable data bandwidth
requirement during a refresh cycle of the LCD. The sections on the screen with overlaps between
overlay 1 and 2 require fetching data at the highest rate. It is important to understand both the long
term average and the peak bandwidth. The average bandwidth is a long term average of the
consumed bandwidth over the entire frame. The peak bandwidth is the highest (instantaneous) data
rate that the LCD consumes - which occurs when fetching data for the overlapped section of the
frame.
The average bandwidth can be calculated as:
The formula for peak bandwidth is:
Plane Bandwidth =
Length
Width
×
Refresh Rate
BPP
×
×
8
-------------------------------------------------------------
-
Bytes / Second
Average Bandwidth
Plane Bandwidths
(
)
∑
=
Peak Bandwidth
Maximum Plane Overlap X Base Plane Bandwidth
=
Summary of Contents for PXA270
Page 1: ...Order Number 280004 001 Intel PXA27x Processor Family Optimization Guide April 2004...
Page 10: ...x Intel PXA27x Processor Family Optimization Guide Contents...
Page 20: ...1 10 Intel PXA27x Processor Family Optimization Guide Introduction...
Page 30: ...2 10 Intel PXA27x Processor Family Optimization Guide Microarchitecture Overview...
Page 48: ...3 18 Intel PXA27x Processor Family Optimization Guide System Level Optimization...
Page 114: ...5 16 Intel PXA27x Processor Family Optimization Guide High Level Language Optimization...
Page 122: ...6 8 Intel PXA27x Processor Family Optimization Guide Power Optimization...
Page 143: ...Intel PXA27x Processor Family Optimization Guide Index 5 Index...
Page 144: ......
