133
Power Delivery
In order to trigger a power fail sequence while the IOP power is still valid operating range, a
comparator circuit such as the one shown in
is recommended.
The comparator circuit shown in
is used to trigger a power-fail sequence while the power
to the IOP is still within valid operating conditions. The trip point of the comparator is set using the
ratio of 0.4. This is set with the voltage divider values of the 10 K and the combined value 12.1 K
and 3.01 K 1% resistors. This ratio provides a trip point value of 2.96 V. When the 3.3 V rail falls
below the 2.96 V level, the PWGD signal is forced low. In the CRB, the
P_RST#
secondary side
reset is tied to the
P_RST#
pin of the IOP. The
P_RST#
triggers the power-fail sequence.
9.2.3
Power Delay
The 80331provides a dedicated input pin,
PWRDELAY
that will be used to distinguish between
and initial power up and a power failure assertion of
PWRGD.
This signal should be pulled up with
a 1.5K resistor.
Figure 67.
Power Failure Comparator Circuit
A9229-01
V+
GND
IN+
IN–
HYST
OUT
8
REF
V–
3.01 K
9
1%
12.1 K
9
1%
10 K
9
1%
10 K
9
5%
+3.3V
7
2
1
4
3
5
6
POWER_GOOD
MAX921
Summary of Contents for 80331
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