1022410 – 0001 Rev. 2
UMOD hardware theory of operation 3–85
For software version 3.03 and higher. The examples shown in
figures 3-62, 3-63, and 3-64 assume the following:
•
The DTE data rates are not the same
•
The DTE will allow phase slips (wander) up to
"
3 clock
cycles of the slower clock
•
If DTE’s internal clock or or station clock is used, input
must be within
"
100 ppm, typically 10 or 1 ppm
•
Set Buffer ON at both ends and:
- If DTE’s clock is used, set TCS and RCS to TXDTE
(see figure 3-62)
- If station clock is used, set TCS and RCS to Station
(see figure 3-63)
- For internal clock, set TCS and RCS to Internal (see
figure 3-64)
Figure 3-62
Independent–timed, limited phase coherent using DTE clock (SW 3.03)
Independent–timed,
limited phase coh. DTE