Hughes 9100 UMOD Installation And Operation Manual Download Page 81 | Manualshive

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Hughes 9100 UMOD Installation And Operation Manual Download Page 81

1022410 – 0001 Rev. 2

3–72 UMOD hardware theory of operation

generated RT clock are phase locked but are not phase coherent.
The STA and RT clocks do not have to be at the same frequency.

Note

While in this mode, the PLL will reference the internal oscillator if there
is no station clock input.

Clock fault operation

If this clock input completely disappears, the UMOD will generate
an

external clock failure

condition, and the RT clock will default to

internal clock. When the clock reappears, normal operation will
resume.

For UMOD software release 2.01 or lower, when this clock input
becomes noisy or is at the wrong frequency (outside 250 ppm of
nominal), UMOD will set Fatal alarm

F12 and the receive side of

the UMOD is deactivated. The UMOD receive side will not restart
until the M&C receives a

GO

or

GORX

command.

For UMOD software release 3.03 or above, when this clock input
becomes noisy or is at the wring frequency (outside 250 ppm of
nominal), UMOD defaults to internal clock. When the clock
reappears, normal operation will resume.

Selecting the INT RCS mode uses the UMOD’s internal reference
TCXO crystal oscillator reference to generate the RT clock.

Note

This internal mode for an RCS selection is only available for software
release 3.03 and higher.

In a loop-timed system, the far (or slave) UMOD clocks its
transmit data (SD) with the recovered receive timing signal (RT)
taken from the signal transmitted by the near (or master) UMOD.
The slave UMOD must be able to withstand variations in the
transmitted clock caused by Doppler shift, as well as other
propagation delays that occur during communications over
satellite links, otherwise synchronization with the received data
will be lost.

The UMOD’s Doppler/plesiochronous buffer allows
newly-received data to be clocked with the RxC signal recovered
from the receive data. Once loaded into the buffer, the data is held
until it can be released in synchronization with the UMOD’s or
DTE device’s timing source. Without the buffer, there would be no
way to allow for short-term fluctuations between the receive and
transmit clock.

Internal receive clock

selection

3.12

Looped–timed
systems

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Summary of Contents for 9100 UMOD

Page 1: ...ne Germantown MD 20876 Tel 301 428 5500 Fax 301 428 1868 2830 HUGHES NETWORK SYSTEMS A HUGHES ELECTRONICS COMPANY 1022410 0001 Rev 2 December 2 1996 9100 UMOD Universal Modem 1 PAK Chassis Installation and Operation Manual ...

Page 2: ...works An integral part of the HNS Gemini VSAT a private digital data network for economical bypass of terrestrial data lines The 9100 UMOD is available in a single modem chassis referred to as the 1 PAK as shown in figure 1 1 and in a ten modem chassis called the 10 PAK The 10 PAK is described in the 9100 UMOD Universal Modem 10 PAK Chassis Installation and Operation Manual HNS document number 805...

Page 3: ... SWITCH PBX LAN M C FUNCTIONS AVAILABLE THROUGH KEYPAD DISPLAY OR BY USING OPTIONAL M C PERSONAL COMPUTER PC UPCONVERTER HPA DOWNCONVERTER Figure 1 2 Typical SCPC MCPC application The UMOD meets the requirements demanded of modern satellite modems as well as several features that offer flexibility for growth from simple SCPC point to point applications to fully networked point to multipoint operat...

Page 4: ...single circuit board Application Specific Integrated Circuits ASICs The single card design is made possible by using several HNS developed ASICs to perform UMOD functions Bit rate 9 6 kbps to 8 448 Mbps selectable in 1 bps increments Baseband interface RS 232 RS 422 449 V 35 or G 703 T1 E1 T2 and E2 IF RF interface 70 MHz 140 MHz or L Band Modulation methods BPSK and QPSK FEC coding compatibility ...

Page 5: ...ction provides physical specifications for the Universal Modem 1 PAK chassis Weight 22 5 pounds 10 2 kg Refer to figure 2 1 for height width and depth dimensions 1 2 3 4 5 6 7 8 9 0 E HUGHES NETWORK SYSTEMS 17 3 in 43 9 cm 19 0 in 48 3 cm 17 3 in 43 9 cm 4 3 in 10 9 cm LESS THAN 3U Figure 2 1 1 PAK chassis physical dimensions 2 1 Physical dimensions 1 PAK chassis ...

Page 6: ...ibes 9100 Universal Modem system specifications Single slot chassis 117VAC 60 Hz power consumption see table 2 1 Table 2 1 Power Usage Conditions Typical Pwr New Spec Pwr PS only no Bd 61 W With UMOD and no RFM 122 W 150W GEMINI with 5 watt radio 197 W 240 W Ranges 52 88 MHz or 104 176 MHz or 52 88 MHz and 104 176 MHz available as an option Step size 100 Hz Less than 0 5 dB degradation with two ad...

Page 7: ... Closed Network Applications Bit Error Rate Test Function 511 bit PN sequence user defined 8 bit repetitive mark space 1010 repetitive Operational Eb No Monitor 1 dB accuracy Uncoded BPSK 0 5 dB from theoretical QPSK 0 75 dB from theoretical in IF Back to Back see table 2 2 on page 2 5 Coded Intelsat specifications are guaranteed Table 2 2 illustrates typical performance Optional redundancy switch...

Page 8: ...uses 1 ppm per year Programmable IDR IBS Custom 50 dBc 100 dBm Hz at 0 dBm output level 130 dBm Hz at 30 dBm output level This section describes 9100 Universal Modem demodulator specifications Input impedance 50 Ω 75 Ω optional Input return loss 20 dB Desired carrier range 30 to 55 dBm Aggregate 5 dBm Composite Carrier 30 KHz Clock 100 ppm Input voltages 2 4 Modulator specifications Transmit power...

Page 9: ...8 4 3 4 8 5 3 56Kbps BPSK Sequential 1 2 4 5 4 9 5 3 5 7 1Mbps BPSK Sequential 1 2 4 7 5 1 5 4 5 8 2Mbps BPSK Concatenated Vit R S 1 2 201 219 4 3 K 7 BPSK Concatenated Vit R S 3 4 201 219 5 8 K 7 QPSK None 1 8 9 10 1 11 1 11 9 12 6 0 75 dB from theoretical QPSK Convolutional Viterbi 1 2 4 1 4 8 5 5 6 1 6 6 K 7 QPSK Convolutional Viterbi 3 4 5 3 5 9 6 4 7 0 7 5 K 7 QPSK Convolutional Viterbi 7 8 5...

Page 10: ...functions in the order they appear in the figure In the transmit direction see figure 3 1 on page 3 2 the UMOD accepts user data at the customer interface module CIM and directs the data across the backplane to the transmit portion of the terrestrial data interface daughtercard either a data interface module or a G 703 interface module installed on the UMOD motherboard After the terrestrial data i...

Page 11: ...1022410 0001 Rev 2 3 2 UMOD hardware theory of operation Figure 3 1 UMOD functional block diagram ...

Page 12: ...led RD receive data SD send data IDI insert data in and DDO drop data out ESC signals including audio ESC octet alignment and backward alarms are supported by the CIM port labeled ESC SIGNALS The CIM also has a station clock port labeled STATION CLK that can receive a 1 MHz to 10 MHz TTL or 0 dBm to 25 dBm level input Note For more information about CIM ports refer to appendix A CIM interface port...

Page 13: ...e is used by the UMOD for interfacing with the user DTE device and is capable of operating with mixed T1 balanced E1 balanced or unbalanced T2 balanced or unbalanced and E2 unbalanced transmit and receive data rates The second interface along with an optional IFU daughtercard supports a two bearer D I framing multiplexer Transmit data entering the main G 703 interface is first converted to TTL lev...

Page 14: ...64 kbps times n where n 1 2 4 6 8 12 and 16 In a standard framing operation transmit data enters the IFU from the GIM The IFU adds ESC supervisory information to the data synchronously scrambles it and then outputs the signals to the UMOD motherboard for further processing Except for the 1 544 2 048 6 312 and 8 448 Mbps rates IDR mode supports D I operations FOR ALL D I OPERATIONS IBS MODE MUST BE...

Page 15: ...FU adds a 1 15 or 6 7 overhead to the data A 1 152 kbps service is supported Data rate is 1288 800 kbps 1152 x 16 15 after overhead is added IBS MODE MUST BE SELECTED In a standard framing operation transmit data enters the IFU from the DIM or GIM The IFU frames the data adds ESC supervisory information to the data synchronously scrambles it and then outputs the signals to the UMOD motherboard for...

Page 16: ...te is 2184 533 kbps At this rate the 2184 533 kbps is handled as if it were unformatted and the 16 15 overhead is added No frame formatting is required If the signal is a G732 signal all bits are passed transparently In a standard framing operation transmit data enters the IFU from the DIM or GIM The IFU frames the data adds ESC supervisory information to the data synchronously scrambles it and th...

Page 17: ...ispersion purposes Inserting the Overhead Channel Frame Marker and Data Packet Differential encoding for resolution of phase ambiguity in the demodulator during initial acquisition and following cycle slips Converting FEC Rate 1 2 to Rate 3 4 or Rate 7 8 Puncturing FEC convolutional encoding Reed Solomon encoding IESS 308 Rev 6A 4 level interleaver per IESS 308 Concatenated Viterbi Reed Solomon en...

Page 18: ...ence and disabling of the scrambler output during bytes 0 and 32 is controlled by the internal framing unit The V 35 scrambler used when operating within an IDR or TES network is self synchronizing and meets CCITT V 35 specifications The scrambler is reset to a known state between bursts and is enabled during a burst When operating in TES asynchronous data burst mode the preamble and postamble por...

Page 19: ...7 Rate 1 2 and 3 4 convolutional encoding K 36 Rate 1 2 and 3 4 concatenated Viterbi and Reed Solomon encoding 4 level interleaver used with Reed Solomon encoder per IESS 308 TES shuffler This circuit is included as part of the UMOD channel coding to allow compatible operation within a TES network Modulator interface preamble and postamble insertion This circuit is included as part of the UMOD cha...

Page 20: ...t block diagram Alias spectra will appear at multiples of the sampling rate of the FIR filter which lie within the passband of the anti alias filter To remove these spectral components a series of interpolation filters are used after the main FIR filter to upsample the data from the FIR filter to a final sample rate in the range of 10 to 20 Msps This upsampling places the alias components within t...

Page 21: ...aused by more complicated multiple conversion transmit IF chains The transmit synthesizer generates the LO at the desired carrier frequency see figure 3 5 on page 3 13 The requirements of a wide LO tuning range 52 to 88 MHz and 104 to 176 MHz and a small step size less than 100 Hz result in a cascaded synthesizer design The first synthesizer in the chain is a numerically controlled oscillator NCO ...

Page 22: ...band and is bypassed for operation in the 140 MHz band The PLL divider modulus of 20 21 is selected to avoid operating the NCO at output frequencies where there are large spurious signals close to the prime output The choice of modulus is coded into the control software and is selected based on transmit frequency for optimum spurious performance Modulator output must be amplified to the desired ca...

Page 23: ...e is derived from a D A converter controlled by the CP This voltage is adjusted until the zero signal output of the detector nulls The CP monitors the nulling process via an A D converter connected between the detector output and the CP The control processor can either allow the ALC circuit to operate automatically or control the transmit level directly In the receive direction see figure 3 1 on p...

Page 24: ... the frequency 52 88 MHz or 104 176 MHz the UMOD motherboard has been configured for The filtered signal is downconverted using a local oscillator LO derived from the receive synthesizer to a second IF of either 20 MHz 52 88 band or 40 MHz 104 176 band lowpass filtered and then sent sent through the AGC amplifier AGC action detected and controlled by the UDMOD ASIC maintains the channel level cons...

Page 25: ... frequency range The frequency resolution Hz LSB of the Rx synthesizer is 0 15 Hz in the 140 MHz band and 0 075 Hz in the 70 MHz band although it is limited to 1 Hz steps by the software The digitized I and Q signals from the A D converters are processed by the receive FIR NCO ASIC as follows First the digitized samples are multiplied by sine and cosine digital sinusoids whose frequency and phase ...

Page 26: ...ns which perform the functions of Carrier recovery phase error detection Bit timing recovery BTR Receive power detection and AGC control Acquisition sweep control Es No determination UDMOD ASIC AGC TO RX IF STAGE CRL OUTPUT TO RX FIR NCO ASIC I Q BTR BTR I Q R DATA AND SOFT DECISION HARD SOFT DECISION AGC AGC TO RX IF STAGE CONTROL PROCESSOR E N b o ESTIMATOR CRL PHASE DETECTOR ACQUISITION SWEEP C...

Page 27: ... Figure 3 10 Channel decoding circuit block diagram I INPUT FIFO Q R TQM RD EN PHASE ROTATOR ROTATE BIT ALIGN MUX ALIGN TES DE SHUFFLER DE PUNCTURE RE SYNC VIT DEC SEQUENTIAL DECODER SELECT DATA SERIALIZER DIFF DEC BPSK DIFF DEC OH CHANNEL EXTRACTOR R S DEC V 35 DES RX DATA OH The channel coding circuit performs the following functions Descrambling data for energy dispersion purposes Differential ...

Page 28: ...rnal framing unit or the terrestial interface is under software control Descrambling Data descrambling performs the complementary operation associated with the distant scrambler Two types of descramblers are provided V 35 and IESS 309 IBS The V 35 descrambler used when operating within an IDR or TES network is self synchronizing and meets CCITT V 35 specifications The descrambler is reset to a kno...

Page 29: ...decoding to allow compatible operation within a TES network The IFU buffers received data for plesiochronous operation or to negate Doppler related timing problems caused by satellite motion supports Engineering Service Channel ESC supervisory overhead and provides backward alarm functions IDR mode In a standard framing operation receive data enters the IFU from the UMOD motherboard The IFU defram...

Page 30: ...rts the TTL level data and clock signals from the UMOD motherboard into one of the following electrical formats EIA RS 232 EIA RS 422 449 or CCITT V 35 For more information on the DIM daughtercard refer to section 3 6 on page 3 41 Terrestrial data interface daughtercard GIM The GIM performs HDB3 B8ZS B6ZS line coding on data received from the UMOD It converts the data from TTL to the required G 70...

Page 31: ...ical interface formats EIA RS 232 EIA RS 422 449 or CCITT V 35 These formats are supported by the 37 pin connector labeled TO DTE CCITT G 703 This format supports balanced T1 also called DS1 balanced or unbalanced E1 also called CEPT balanced or unbalanced T2 also referred to as DS2 and unbalanced E2 electrical interfaces The balanced G 703 port is labeled G 703 BAL the unbalanced G 703 ports are ...

Page 32: ...information into commands understood by UMOD circuitry The control processor is responsible for initializing UMOD components after a reset loading UMOD applications software performing startup diagnostics performing logic functions required for call processing and participating in network management and control The CP controls data port data rates multidrop port direction and baseband data modem c...

Page 33: ...and monitors the bit error rate BER The CP also controls the light emitting diodes LEDs on the UMOD motherboard monitors chassis address code and chassis type information controls the summary alarm relay and monitors slot ID code information The core of the CP is a microprocessor operating at 16 MHz see figure 3 11 The CP has 128 Kbytes of programmable read only memory PROM for TES mode boot code ...

Page 34: ...ODULATOR DEMODULATOR INTERFACE ADDRESS DATA CONTROL BUS TERRESTRIAL INTERFACE MODULE CHANNEL CODING INTERFACE SERIAL COMMUNICATIONS CONTROLLER SCC ADDRESS DATA CONTROL BUS QUAD UART SCC INTERRUPT DIAGNOSTIC PORT SATELLITE PORT QUART INTERRUPT TERMINAL KEYBOARD DISPLAY PORT ASYNC DATA PORT MULTIDROP PORT 2 MULTIDROP PORT 1 The timing generator TGEN provides all clock signals used on the UMOD module...

Page 35: ...DTE EXT CLK TX SYM DATA TX SYM CLK CONTROL PROCESSOR NCO PLL PHASE CONTROL TXR1 CLK DTE INT CLK DEMOD RXR1 CLK STATION CLK INFO RATE OVERHEAD VITERBI FIFO FRAMING PUNCTURE COUNTERS REED SOLOMON RATE Transmit clock signals are generated by a programmable sequencer that punctures a clock sourced by a numerically controlled oscillator NCO The TXTG receives its reference clock from a reference oscilla...

Page 36: ...symbol rate Receive Reed Solomon encoding symbol rate Receive information Framing overhead clock Demodulator clock RXTG operation is identical to the TXTG The clock signals are generated by a programmable sequencer that punctures a high speed clock sourced by an NCO The NCO output clock frequency is programmable through its CP interface The RXTG receives its reference clock from a highly stable re...

Page 37: ...TROL RXR1 CLK DTE INT CLK ST TT DTE TT STATION CLK RX DOPPLER FIFO DATA FROM CHANNEL DECODER RX DATA DTE RXD INFO RATE OVERHEAD VITERBI FRAMING PUNCTURE COUNTERS REED SOLOMON RATE The receive timing generator reference frequency is selectable from one of the following sources Satellite clock recovered symbol clock External clock The receive timing generator is phase locked to a user supplied clock...

Page 38: ...se allow the user to configure modem settings for transmit and receive differential coding transmit and receive scrambling the FEC rate and type etc Modem control and configuration controls These control such modem functions as activating the transmit carrier resetting the modem enabling the overhead channel determining whether the front panel or the terminal interface will control the quad univer...

Page 39: ...can connect to the UMOD terminal interface port located on the CIM The port labeled M C enables the user to configure and monitor the UMOD using built in terminal software or the optional Windows based M C software 1 2 3 4 5 6 7 8 9 0 E HUGHES NETWORK SYSTEMS MODEM U N I V E R S A L RS 232 LINK TERMINAL OR PC UMOD Figure 3 14 Controlling the UMOD via the terminal interface In addition commands and...

Page 40: ...erator to scan the modem for abnormal operating conditions Front panel keypad operation The front panel provides access to commands that control the UMOD Some commands are used to modify parameters others display operating parameters These commands are organized in a structure of menus and lists of commands as illustrated in figures 3 16 on page 3 32 and 3 17 on page 3 33 The complete list of pane...

Page 41: ...and If a menu displays select an item with the keypad in the same manner as with the main menu When a command displays it will also display its current value on the next line which is updated every 2 seconds until you press the E key to stop the updating The last line is formatted with values to select with the cursor controlled by the and A keys or with space to enter values via the keypad A symb...

Page 42: ...3 Ins Port BPV Thresh 0 Activate Config TX RX BOTH G703INT menu Ins Port Bal BAL BAL UNBAL Sta Clk Freq Hz 26777216 Activate Config TX RX BOTH Tx Framing Mode UNFRAME UNFRAMED IDR IBS Rx Framing Mode UNFRAME UNFRAMED IDR IBS If an ASCII terminal is being used the user accesses the M C using mnemonic commands typed in at the ASCII terminal keyboard For example to set the transmit modulation TM comm...

Page 43: ...f hard to remember mnemonic codes Once the user has selected a command the UMOD M C software translates that command into the appropriate terminal command understood by the Universal Modem For example to set the transmit modulation TM command for BPSK operation in the UMOD M C software the user would use the mouse to select the UMOD Configuration menu see figure 3 18 on page 3 34 click on the Modu...

Page 44: ...rminal PC can control up to 30 modems through the single physical connection Figure 3 19 Inter UMOD communications paths UMOD 10 PAK CHASSIS 500 RS 232 LINK UMOD 10 PAK CHASSIS 600 M C MULTIDROP Overhead Channel M C MULTIDROP RS 485 Slot 9 Slot 10 Slot 7 Slot 8 Slot 5 Slot 6 Slot 3 Slot 4 Slot 1 Slot 2 Slot 9 Slot 10 Slot 7 Slot 8 Slot 5 Slot 6 Slot 3 Slot 4 Slot 1 Slot 2 In a closed network besid...

Page 45: ...sage is entirely transmitted Each frame is protected by a one byte checksum to guarantee data integrity If more than one UMOD tries to transmit a frame at the same time or within a very close interval the data will be corrupted and thus discarded by the receiving UMODs Traffic contention on the multidrop bus Access to the multidrop bus is contention based That is every modem has equal access to th...

Page 46: ... a failed state The redundant UMOD motherboard then switches the user terrestrial interface lines to itself and begins operating in whatever mode the primary UMOD was in previously The redundant modem also polls each of the primary UMODs for their status Status indications of an ongoing or incipient failure in a primary UMOD is also sufficient for the redundant UMOD to switch in Two 1 PAK chassis ...

Page 47: ...ts have failed see figure 3 22 Figure 3 22 Redundancy poll response Redundant Modem Primary Modem The redundant modem periodically polls any of the primary modems within its domain The primary modem sends a poll response which contains a operational configuration revision number fatal alarm status and receive frequency offset value The poll response data consists of a configuration revision number...

Page 48: ...l fatal error it will notify the redundant UMOD that it has failed and sound the audible alarm to alert an operator The failed primary UMOD will automatically cease transmission This will occur whether or not redundancy is being used The failed UMOD will reject any commands to enter operational mode and will display a failure code on the front panel LED window terminal display At this stage if the...

Page 49: ...ng types that the primary UMOD has been set for Manual switchover In manual mode the following rules apply All alarms and failures are reported through the M C to the far controller The far controller must command the redundant UMOD to take over from the primary UMOD Following a redundancy switchover the failed primary UMOD must be replaced Once the replacement primary UMOD has been installed and ...

Page 50: ...D TTL signals to RS 232 RS 422 449 or V 35 electrical format The DIM also supports data loopback capabilities for testing the UMOD Figure 3 24 UMOD interface to user DTE device through the DIM DTE TTL RS 422 449 RS 232 OR V 35 UMOD MOTHER BOARD DIM DAUGHTER CARD 9100 UMOD The DIM is controlled by the CP located on the UMOD motherboard through the CP interface see figure 3 25 on page 3 42 The CP in...

Page 51: ...8 8 STATUS REGISTER INTERFACE DECODER RS422 TTL OR RS232 TTL CONVERTER TTL RS422 OR TTL RS232 CONVERTER RxD RxR1 TxR1 SD TT RD RT ST FROM INTERFACE DECODER TTL RS232 OR TTL RS422 OR TTL V 35 CONVERTER CLOCK 8 DATA FLOW REGISTER CP INTERFACE TO DATA FLOW REGISTER RS232 TTL OR RS422 TTL OR V 35 TTL CONVERTER TxD CONTROL FROM UMOD MOTHERBOARD CONTROL PROCESSOR TO DTE TO UMOD FROM DTE FROM DTE TO DTE ...

Page 52: ...ansmit clock is selected as the source for transmit signal element timing when the UMOD transmit timing generator is either referenced to the internal oscillator or to the recovered satellite clock Normally the falling edge of ST indicates the center of each signal element on the SD circuit However the clock to data phase relationship is not important as far as it meets the distortion and jitter s...

Page 53: ...eive clock and in the Inverted mode the data is retimed on the falling edge This option is software selectable Control signals The DIM Data Flow Register handles the control signals The baseband terrestrial interface control signals are divided into DTE generated control signals signals coming from the user equipment and DCE generated control signals signals coming from the UMOD 2 DTE generated co...

Page 54: ...ace to the user s data terminal equipment DTE device The GIM performs appropriate HDB3 B8ZS and B6ZS line coding or decoding clock recovery removes jitter from transmit data bipolar violation alarm monitoring loss of signal detection and alarm indication signal AIS generation and detection The GIM also supports data loopback capabilities for testing the UMOD Figure 3 26 shows a UMOD interfacing to...

Page 55: ...the GIM very versatile and easy to set up The circuit s jitter tolerance meets CCITT G 824 and T T TR 62411 recommendations E1 T1 transmit operations In the transmit incoming direction T1 or E1 data enters the GIM from the SD port of the CIM see figure 3 27 on page 3 47 The signal is passed through a transformer then routed to the send data SD E1 T1 line interface unit LIU The LIU extracts clock T...

Page 56: ... IFU DROP DATA OUT E1 T1 CLOCK E1 T1 DATA E1 T1 IDI LIU E1 T1 CLOCK E1 T1 DATA USER G703 BIPOLAR INSERT DATA IN IDI PORT INSERT CLOCK TO IFU FROM IFU E1 T1 DDO LIU DROP CLOCK DROP DATA USER G703 BIPOLAR DROP DATA OUT DDO PORT USER G703 BIPOLAR RECEIVE DATA RD PORT SELECT E2 T2 RD LIU E1 T1 RD LIU RxD RxC FROM UMOD MOTHER BOARD OR IFU E2 T2 CLOCK E2 T2 DATA FROM TO UMOD MOTHERBOARD CONTROL PROCESSO...

Page 57: ...s a substitute for these zeros This guarantees that a minimum pulse density is present for accurate clock recovery E1 data is encoded using the analog HDB3 a version of the AMI format HDB3 coding does not allow more than three successive zeros to be transmitted In the same fashion as B8ZS encoding HDB3 substitutes a unique code as a substitute for these three zeros guaranteeing that a minimum puls...

Page 58: ...on E1 T1 receive operations Twin bearer D I bipolar interface Note Twin bearer operation in the 10 PAK chassis is limited to a balanced G 703 interface The unbalanced G 703 does not permit twin bearer operation This interface uses two separate bearers in combination with the IFU to support independent drop and insert multiplexers The twin bearer D I bipolar interface together with the primary bipo...

Page 59: ...e backplane to the DDO port on the CIM and from there to the user s DTE device see figure 3 29 Figure 3 29 GIM twin bearer D I interface SD LIU DDO LIU IDI LIU RD LIU T1 OR E1 T1 OR E1 T1 OR E1 T1 OR E1 TO FROM DTE TxD TT DROP DATA OUT INSERT DATA IN INSERT CLOCK RxD RxC TO UMOD FROM IFU TO IFU FROM UMOD GIM BEARER 1 BEARER 1 BEARER 2 BEARER 2 Insert operations For an insert operation a second ter...

Page 60: ... Please note that IDR specifications define a SMALL IDR mode which employs IBS style framing These SMALL IDR modes are invoked by selecting IBS mode for the UMOD In the IDR mode transmit data enters the IFU through a DIM or a GIM the ESC data is added increasing the data rate by 96 kbps this is then output to the UMOD motherboard for modulation see figure 3 30 TTL SIGNAL MONITOR TX PLL TX FIFO FRA...

Page 61: ...on links for engineering use One 8 kbps data channel with a maintained octet alignment between stations this provide several low rate telegraph channels Four backward alarms for alarm signalling on multi destination carriers In the IBS SMS mode transmit data enters the IFU through a DIM or a GIM the data rate is increased by approximately 7 to accommodate supervisory information it is then synchro...

Page 62: ...ate being used A backward alarm facility The framing unit provides framing and buffering for data rates of 1 544 Mbps T1 2 048 Mbps E1 6 312 Mbps T2 and 8 448 Mbps E2 or buffering only for IDR data rates of 64 192 and 384 kbps During a transmit operation the framing unit adds a 96 kbps ESC overhead to the regular transmit data The overhead is used for one 8 kbps data channel four backward alarm ch...

Page 63: ...n it loses frame synchronization At this point station A is unaware that there is a problem with the transmitted data and station B recognizes that there is a problem receiving station A s data but cannot determine where the fault lies 9100 IFU TX PATH SEND BACKWARD ALARM RX FAIL PROMPT ALARM A 9100 IFU RX PATH INCOMING BACKWARD ALARM OUPUT 9100 IFU RX PATH RX FAIL PROMPT ALARM B 9100 IFU RX PATH ...

Page 64: ... four backward alarm inputs BA1 IN through BA4 IN pins 32 through 35 of the ESC connector see page A 7 The network operator must determine where the RX FAIL prompt alarm is connected for each site There are four backward alarm outputs that are connected to an alarm at that site Single destination carriers These perform the same as the SMS IBS backward alarms but are not generated automatically To ...

Page 65: ... 3 4 SEND BACKWARD ALARM 1 BACKWARD ALARMS 2 4 NOT USED INCOMING BACKWARD ALARM 1 OUTPUT TX FAIL 9100 IFU RX PATH RX FAIL PROMPT ALARM C 9100 IFU TX PATH 1 2 3 4 1 2 3 4 SEND BACKWARD ALARM 1 BACKWARD ALARMS 1 3 4 NOT USED INCOMING BACKWARD ALARM 2 OUTPUT TX FAIL Figure 3 33 Backward alarm use with multi destination carriers In figure 3 33 a multi destination carrier transmitted by station A is re...

Page 66: ...e alarm is a result of the near transmit end simultaneously or the far receive end Now if station A transmit fails both B and C will generate an alarm however if B or C receive fail only one incoming alarm will be generated The UMOD Doppler plesiochronous buffer accommodates all IDR IBS data rates and clock configurations Buffer depth is variable and is dependent on the data rate and clock configu...

Page 67: ... three types of D I operations single bearer twin bearer and cascading see figure 3 34 G732 OR G733 BEARER CEPT OR T1 BEARER EXITS CARRYING ALL RECEIVE DATA IFU WITH D I ACTIVE IFU WITH D I ACTIVE IFU WITH D I ACTIVE UMOD 1 UMOD 2 UMOD 3 CASCADING G732 OR G733 BEARER 1 CEPT OR T1 TWIN BEARER G732 OR G733 BEARER CEPT OR T1 BEARER EXITS CARRYING ALL RECEIVE DATA SINGLE BEARER IFU WITH D I ACTIVE SD ...

Page 68: ...R CEPT BEARER CARRYING DATA TO CUSTOMER OVERHEAD PORT IFU DATA WITH OVERHEAD FROM SATELLITE G732 G733 DROP MUX G732 G733 INSERT MUX SD RD DIM OR GIM BUFFER DEFRAMER FRAMER IFU DATA WITH OVERHEAD TO SATELLITE T1 OR CEPT BEARER CARRYING DATA FROM CUSTOMER T1 OR CEPT BEARER CARRYING DATA TO CUSTOMER OVERHEAD PORT IFU DATA WITH OVERHEAD FROM SATELLITE G732 G733 DROP MUX G732 G733 INSERT MUX SD RD DIM ...

Page 69: ...e bearer with idle code 01010101 for E1 or 01111111 for T1 or leaves the timeslots intact with the original data The dropped frames are routed to the framer then output to the UMOD motherboard Meanwhile the T1 or CEPT bearer is passed to the receive path where the insert mux inserts incoming frames into preselected timeslots on the bearer Timeslots not selected for drop or insert operations are pa...

Page 70: ...ith the drop multiplexer completely independent from the insert multiplexer In this configuration the CIM ports are configured as follows For bearer 1 ports SD send data and DDO dropped data out are used for the drop operation For bearer 2 ports IDI insert data in and RD receive data are used for the insert operation DDO IFU DATA WITH OVERHEAD TO SATELLITE T1 OR CEPT BEARER 1 T1 OR CEPT BEARER 2 O...

Page 71: ...D RD SD RD SD RD Figure 3 37 Cascading D I operation D I using a composite carrier Each IFU can be set to D I any combination of timeslots therefore several users data can be combined onto a single composite carrier The IBS SMS satellite overhead maintains each timeslot s identity as it is routed across the satellite link so that several data channels may be dropped from a bearer transmitted via s...

Page 72: ...nents inside the near UMOD Test the UMOD RF equipment and the satellite Perform a full loopback where both the near and far UMODs are tested The user s DTE device transmits data through the portion of the communications link being tested the BERT can also be used to transmit test data which then loops the data back to the DTE device or the BERT as received data The user then compares the received ...

Page 73: ...ear UMOD loops the data through the DIM or GIM and transmits it back to the user device This loopback verifies that user equipment connecting cables and UMOD terrestrial data interface circuits are functional UMOD BOARD Figure 3 39 System level view of the near loopback NEAR UMOD FAR UMOD DIM OR GIM DTE DIM OR GIM DTE UMOD BOARD SATELLITE ...

Page 74: ...ystem excepting the far DTE device The far loopback tests the following equipment Near DTE device and connecting cables Near UMOD radio frequency terminal RFT and antenna subsystem Satellite transponder Far UMOD RFT and antenna subsystem Figure 3 40 System level view of the far loopback UMOD BOARD NEAR UMOD FAR UMOD DIM OR GIM DTE UMOD BOARD DIM OR GIM DTE SATELLITE ...

Page 75: ... to test various UMOD components The BERT function consists of an independent transmit pattern generator and a receive error analyzer Transmit BERT pattern generator parameters are as follows Industry standard 511 bit m length pseudo random sequence 8 bit user entered repetitive pattern All l s All 0 s 1010 repetitive 6 bit user entered repetitive pattern Insert a single error The BERT error analy...

Page 76: ...ERT Terrestrial Port Card Modulator Encoder Decoder Demodulator and and UMOD Main Card IF Loopbacks optional Terrestrial data interface see figure 3 43 This loopback connects the BERT to the terrestrial data interface either a DIM or GIM This option can be combined with either the general Near or Far loopback commands Figure 3 43 Terrestrial data interface BERT loopback connection TX IF RX IF TX R...

Page 77: ...f operation Timing problems can result in increased BER synchronization loss and other satellite communications problems The UMOD supports synchronous data communications and requires stable and synchronous clock signals and data to ensure reliable link operations The UMOD has a variety of clocking modes This section explains each mode and clarifies the proper configuration for each mode when the ...

Page 78: ...nal terminal timing TT external station clock input STA and recovered from Demod REC The selection of INT TCS uses the UMOD s internal TCXO crystal oscillator reference to generate the send timing ST clock The transmitted symbol rate is locked to this ST clock The TT clock input is ignored for this mode This selection of TXDTE TCS uses the external TT clock input from the data terminal equipment D...

Page 79: ...ependent of data rate The station clock and the generated ST clock are phase locked but are not phase coherent The STA and ST clocks do not have to be at the same frequency The transmitted symbol rate is locked to this ST clock The TT clock input is ignored for this mode Clock fault operation If this clock input completely disappears the UMOD will generate a Tx ext clock fail condition and will co...

Page 80: ... generate the RT clock Clock fault operation While RCS TXTDE if the Tx Clk Source TCS INT STA or REC there will not be an Rx Clk Failure condition because the Rx PLL always generates the clock When RCS and TCS TXDTE and the clock input completely disappears the UMOD generates an Rx Clk Fail condition and the RT clock will default to internal When the clock reappears normal operation resumes For UM...

Page 81: ...clock When the clock reappears normal operation will resume Selecting the INT RCS mode uses the UMOD s internal reference TCXO crystal oscillator reference to generate the RT clock Note This internal mode for an RCS selection is only available for software release 3 03 and higher In a loop timed system the far or slave UMOD clocks its transmit data SD with the recovered receive timing signal RT ta...

Page 82: ... illustrated in figures 3 46 and 3 47and assume the following The DTE data rates are all the same The DTE requires a slaved phase relationship where no phase wander is allowed If station clock is used input must be within 100 ppm For the near or master end set Buffer ON TCS must be set to TXDTE and RCS must be set to Station with or without station clock For the far or slave end set Buffer OFF RCS...

Page 83: ...r up to 3 bits if data rates are the same If the DTE clock is used it must be within 100 ppm If station clock is used input must be within 100 ppm For the near or master end set Buffer ON and If DTE clock is used set TCS to TXDTE and RCS to TXDTE see figure 3 48 If station clock is used set TCS to Station and RCS to Station see figure 3 49 If internal clock is used set TCS to Internal and RCS to S...

Page 84: ...10 0001 Rev 2 UMOD hardware theory of operation 3 75 Figure 3 48 Looped timed limited phase coherency DTE clock reference SW 2 01 Figure 3 49 Looped timed limited phase coherency station clock input SW 2 01 ...

Page 85: ...1022410 0001 Rev 2 3 76 UMOD hardware theory of operation Figure 3 50 Looped timed limited phase coherency internal clock input SW 2 01 ...

Page 86: ...station clock is used input must be within 100 ppm For the near or master end set Buffer ON and If TXDTE clock is used set TCS to TXDTE see figure 3 51 If station clock is used set TCS and RCS to Station see figure 3 52 If internal clock is used set TCS and RCS to Internal see figure 3 53 For the far or slave end set Buffer OFF RCS and TCS must be set to Recovered Note These settings will also wor...

Page 87: ...22410 0001 Rev 2 3 78 UMOD hardware theory of operation Figure 3 52 Looped timed phase coherent using station clock input SW 3 03 Figure 3 53 Looped timed phase coherent using internal clock input SW 3 03 ...

Page 88: ...ach UMOD to negate propagation related delay and phase differences between the receive timing source and the local clock and then adjust the received data output to the DTE device This section describes independent timed plesiochronous systems with phase coherent and limited phase coherent DTE for different software versions Software versions are grouped as 2 01 and lower and 3 03 and higher For s...

Page 89: ...ation If the station clock is used TCS must be set to TXDTE and RCS must be set to Station see figure 3 55 Figure 3 54 Independent timed phase coherency w o external clock SW 2 01 Figure 3 55 Independent timed phase coherency with external clock SW 2 01 ...

Page 90: ...ency clock If the DTE s internal clock or station clock is used input must be within 100 ppm typically 10 or 1 ppm Set Buffer ON at both ends and If the DTE s clock is used set TCS and RCS to TXDTE see figure 3 56 If the station clock is used set TCS and RCS to Station see figure 3 57 For internal clock set TCS to Internal and RCS to Station see figure 3 58 Figure 3 56 Looped timed limited phase u...

Page 91: ...1022410 0001 Rev 2 3 82 UMOD hardware theory of operation Figure 3 57 Looped timed limited phase using station clock SW 2 01 Figure 3 58 Looped timed phase or limited phase using internal clock SW 2 01 ...

Page 92: ...same The DTE requires a slaved phase relationship where no phase wander is allowed If station clock or TXDTE is used input must be within 100 ppm typically 10 or 1 ppm Set Buffer ON at both ends and If DTE s clock is used set TCS and RCS to TXDTE see figure 3 59 If station clock is used set TCS and RCS to Station see figure 3 60 If UMOD s internal clock is used set TCS and RCS to Internal see figu...

Page 93: ...2410 0001 Rev 2 3 84 UMOD hardware theory of operation Figure 3 60 Independent timed phase or limited phase station clock SW 3 03 Figure 3 61 Independent timed phase or limited phase internal clock SW 3 03 ...

Page 94: ... the slower clock If DTE s internal clock or or station clock is used input must be within 100 ppm typically 10 or 1 ppm Set Buffer ON at both ends and If DTE s clock is used set TCS and RCS to TXDTE see figure 3 62 If station clock is used set TCS and RCS to Station see figure 3 63 For internal clock set TCS and RCS to Internal see figure 3 64 Figure 3 62 Independent timed limited phase coherent ...

Page 95: ...imed phase or limited phase internal clock SW 3 03 For these systems virtually all clocking options apply because clock phase and frequency are independent on both links At each end the transmit clock source TCS selections are internal INT TXDTE external TT external station clock input STA and recovered from Demod REC Independent timed non plesiochronous ...

Page 96: ...1022410 0001 Rev 2 UMOD hardware theory of operation 3 87 The RCS selections are REC TXDTE and STA For the software release 3 03 and above there is a fourth mode INT ...

Page 97: ...1022410 0001 Rev 2 3 88 UMOD hardware theory of operation ...

Page 98: ...ates At startup or after a reset the modem initializes prepares for operation the following UMOD hardware components Terminal interface M C port Front panel interface and LEDs Multidrop link CIM ports P2 and P3 Microprocessor memory Modulator Encoder Demodulator Decoder Frequency synthesizers Terrestrial data interface daughtercard DIM or GIM Optional IFU Clock timing generators Terrestrial data i...

Page 99: ...ure 4 1 UMOD control processor memory map Once UMOD operating mode has been selected the CP activates the 64 Kbyte UMOD boot EPROM to begin the low level hardware diagnostics tests These tests verify that critical UMOD components such as memory and the microprocessor are functioning properly and that the applications software loaded into the 256 Kbyte flash operational code memory has not become c...

Page 100: ...In the acquisition state the modem sweeps to find a receive signal Once the modem has found a valid receive signal the modem considers itself to be in track mode and stops sweeping When the modem is tracking a signal and loses lock it considers itself to be in a fade During a fade the modem looks for the receive signal to reappear at the current frequency If the signal does not reappear before the...

Page 101: ...me which the modem spends at each frequency during acquisition sweep A transition from acquisition to tracking takes place only when the signal is locked for two consecutive samples After the modem moves into track mode the receive signal is monitored at one second intervals The track frequency offset and Eb No are written into RAM at periodic intervals An average of these values can be retrieved ...

Page 102: ...le from the antenna to the location where the modem will be installed Rack mounting shelf installation page 5 7 describes installing the UMOD rack mounting shelf in a standard 19 inch rack Cable installation page 5 7 describes installing the IFL and user equipment interface cables Installing the multidrop cables page 5 9 describes installing multidrop cables between as many as 30 Universal Modems ...

Page 103: ...osition in the rack 2 Secure the shelf in position with the four mounting screws provided Inspect the shipping containers for external damage Note any damage before opening the container Report equipment damage to the shipping carrier immediately for claim purposes Save all packing materials in case you need to return an item to the factory for servicing You will need the following tools and mater...

Page 104: ...IFL CABLE IF OUT IF IN TC TD RC GND RD A B C DEF0 1 2 3 4 5 6 7 8 9 A B C DEF0 1 2 3 4 5 6 7 8 9 A B C DEF0 1 2 3 4 5 6 7 8 9 A B C DEF0 1 2 3 4 5 6 7 8 9 ID I CONFIG STATIO N CLK RD DDO SD G 703 BAL REDUNDANCY ESC SIG NALS TO DTE 0 1 POWER SWITCH l 0 Figure 5 1 Universal Modem O power switch location 3 Route the IFL cable and all user equipment interface cables to the location where the modem wil...

Page 105: ...EFORE CONNECTING DISCONNECTING IFL CABLE IF OUT IF IN A B C DEF0 1 2 3 4 5 6 7 8 9 A B C DEF0 1 2 3 4 5 6 7 8 9 A B C DEF0 1 2 3 4 5 6 7 8 9 A B C DEF0 1 2 3 4 5 6 7 8 9 TC TD RC GND RD l 0 ID I M C STATIO N CLK RD DDO SD G 703 BAL REDUNDANCY ESC SIG NALS TO DTE POWER CORD RECEPTACLE Figure 5 2 Power cord receptacle location 5 Connect the female end of the ac power cord into the receptacle see fig...

Page 106: ...ponents and performs full function diagnostics self tests See figure 5 3 for LED location If the tests are successful you will see the sequence of displays on the LED readout as presented in table 5 1 Each is a solid display not flashing The presence of a dot indicates that the UMOD board failed a test M O D E M U N I V E R S A L SLOT 2 SLOT 1 OPTIONAL RFM BOARD Figure 5 3 UMOD front panel LEDs ...

Page 107: ...nterrupt controller PIC test This test examines the internal PIC NVRAM test This test computes the checksum for the non volatile random access memory NVRAM and compares it to the checksum stored in the last two bytes of NVRAM memory Flash code verification This test verifies that the flash memory has not been corrupted by calculating the checksum and comparing the result to the stored value Full f...

Page 108: ... equipment interface cables 1 This step describes installing the DTE device cables onto the CIM Refer to table 5 2 to locate the desired connection type then look for the checked entries to determine which CIM connectors will be used CIM Connectors TO DTE G 703 BAL ESC SIGNALS RD SD Connection Type Balanced G 703 Balanced G 703 single bearer D I Balanced G 703 twin bearer D I Balanced G 703 cascad...

Page 109: ... 9 ESC SIGNALS CONNECTION UNBALANCED G 703 CONNECTION RECEIVE DATA UNBALANCED G 703 CONNECTION DROP DATA OUT 1 TO 10 MHz FREQUENCY REFERENCE INPUT P2 P3 S1 S2 S3 S4 TP1 TP2 TP3 TP4 TP5 UNBALANCED G 703 CONNECTION INSERT DATA IN UNBALANCED G 703 CONNECTION SEND DATA RS 449 RS 232 V 35 CONNECTION BALANCED G 703 CONNECTION Figure 5 4 Customer interface module CIM 4 Install the IF IN cable onto the IF...

Page 110: ...tus and control many UMOD functions The multidrop cables are connected to connectors P2 and P3 on the rear of the chassis UMOD chassis 1 is wired to chassis 2 chassis 2 is wired to chassis 3 and so on until all chassis are connected see figure 5 6 P2 P3 P2 P3 P2 P3 P2 P3 P2 P3 CHASSIS 1 CHASSIS 2 CHASSIS 3 CHASSIS 4 CHASSIS 5 MULTIDROP CABLE Figure 5 6 Example multidrop cable connection diagram fo...

Page 111: ...ATION CLK DDO RD TD RC GND RD A B C D EF01 2 3 4 5 6 7 8 9 A B C D EF01 2 3 4 5 6 7 8 9 A B C D EF01 2 3 4 5 6 7 8 9 A B C D EF01 2 3 4 5 6 7 8 9 MULTIDROP CONNECTOR P2 MULTIDROP CONNECTOR P3 P2 P3 S1 S2 S3 S4 TP1 TP2 TP3 TP4 TP5 Figure 5 7 Multidrop connectors location Perform the following procedure to install the multidrop cables 2 Repeat step 1 to install multidrop cables between the remaining...

Page 112: ...UNIT CAUTION TURN OFF POW ER BEFORE CONNECTING DISCONNECTING IFL CABLE IF OUT IF IN A B C DEF0 1 2 3 4 5 6 7 8 9 A B C DEF0 1 2 3 4 5 6 7 8 9 A B C DEF0 1 2 3 4 5 6 7 8 9 A B C DEF0 1 2 3 4 5 6 7 8 9 TC TD RC GND RD l 0 ID I M C STATIO N CLK RD DDO SD G 703 BAL REDUNDANCY ESC SIG NALS TO DTE SWITCH S4 A B C D EF01 2 3 4 5 6 7 8 9 A B C D EF01 2 3 4 5 6 7 8 9 A B C D EF01 2 3 4 5 6 7 8 9 A B C D EF...

Page 113: ...Dchassiscodesettingis7FFF thereforeswitchS1 cannot be set to a higher setting than 7 Switches S2 thru S4 can each be set as high as F 2 Set switch S2 to the same setting as the second digit in the code In the example this number would be E 3 Set switch S3 to the same setting as the third digit In the example this number would be B 4 Set switch S4 to the same setting as the fourth digit In the exam...

Page 114: ...the cable onto the redundant UMOD chassis 3 If the customer equipment interface is RS 449 V 35 or RS 232 install the Y ends of the DTE Y redundancy cable onto the TO DTE connector on the primary and redundant UMOD chassis 4 Install the remaining end of the cable onto the customer equipment 5 If the customer equipment interface requires G 703 signalling install the Y ends of the G 703 redundancy ca...

Page 115: ...test This test verifies that the serial com munications controller SCC is functional SCC DMA test This test verifies DMA access to the SCC PIC test This test examines the internal PIC NVRAM test This test computes the checksum for the non volatile random access memory NVRAM and compares it to the checksum stored in the last two bytes of NVRAM memory Flash code verification This test verifies that ...

Page 116: ...t it is acquiring a carrier then display an L to show that it has locked onto the carrier signal If autostart operation is disabled the UMOD will display a U to indicate that it is in idle mode but ready to begin operation If redundancy is in use and the UMOD is configured as the redundant modem it will display an r to indicate that it currently polling the primary modem s status Hardware installa...

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