
1022410 – 0001 Rev. 2
3–46 UMOD hardware theory of operation
(balanced), E1 (balanced or unbalanced), T2 (balanced or
unbalanced), and E2 (unbalanced).
Note
The terms T1, E1, T2, and E2 describe bipolar digital data links that
conform to the following electrical interfaces (as defined in CCITT
G703 and T1.102):
D
T1: Primary rate carrier at 1544 kbps. Also referred to
as DS1.
D
E1: Primary rate carrier at 2048 kbps. Also referred to
as CEPT.
D
T2: Secondary rate carrier at 6312 kbps. Also referred
to as DS2.
D
E2: Secondary rate carrier at 8448 kbps.
For example, the primary bipolar interface can receive an
incoming 8448-kbps unbalanced E2 signal with HDB3 coding
while generating an outgoing balanced 1544-kbps T1 signal with
B8ZS coding. This flexibility, and the fact that all of the functions
are under software control (with no jumpers or switches) make the
GIM very versatile and easy to set up. The circuit’s jitter tolerance
meets CCITT G.824 and T&T TR 62411 recommendations.
E1/T1 transmit operations.
In the transmit (incoming)
direction, T1 or E1 data enters the GIM from the SD port of the
CIM (see figure 3-27 on page 3–47). The signal is passed through
a transformer, then routed to the send data (SD) E1/T1 line
interface unit (LIU). The LIU extracts clock (TT) and data (TxD)
from the T1 (SD-A and SD-B) or E1 (SD-A and SD-B for
balanced, or SD-B for unbalanced) signals. A phase-locked loop
(PLL) circuit inside the LIU locks onto the T1 or E1 signal and,
using an external crystal, removes the jitter.
E1/T1 receive operations.
In the receive (outgoing) direction,
the receive data (RD) LIU takes clock (RxC) and data (RxD) lines
from the UMOD motherboard or IFU and produces bipolar pulses
of appropriate shape. The pulses are transformer-coupled and
14-dB of return loss is provided during transmission of both marks
and spaces. The T1 or E1 signals are then output across the
backplane to the RD port of the CIM.