Contents 77
Table 7
POST beep codes
Code Beep Description
59h
Initialize POST display service
5Ah
Display prompt ”Press F10 to enter SETUP”
5Bh
Disable processor cache
5Ch
Test RAM between 512 and 640 KB
60h
Test
extended
memory
62h
Test extended memory address lines
64h
Jump to user patch 1
66h
Configure advanced cache registers
67h
Initialize multiprocessor APIC
68h
Enable external and processor caches
69h
Setup System Management Mode (SMM) area
6Ah
Display external L2 cache size
6Bh
Load custom defaults (optional)
6Ch
Display shadow-area message
6Eh
Display possible high address for UMB recovery
70h
Display error messages
72h
Check for configuration errors
76h
Check for keyboard errors
7Ch
Set up hardware interrupt vectors
7Dh
Initialize Intelligent System Monitoring
7Eh
Initialize coprocessor if present
80h
Disable onboard super I/O ports and IRQs
81h
Late POST device initialization
82h
Detect and install external RS232 ports
83h
Configure non-MCD IDE controllers
84h
Detect and install external parallel ports
85h
Initialize PC-compatible PnP ISA devices
86h
Re-initialize onboard I/O ports.
87h
Configure system board configurable devices (optional)
88h
Initialize BIOS data area
89h
Enable non-maskable interrupts
8Ah
Initialize extended BIOS data area
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