TABLE OF CONTENTS
CHAPTER 1: INTRODUCTION
..................................................................................................................................5
1.0
Introduction .................................................................................................................................................................... 6
1.1
Functional Description.................................................................................................................................................. 6
FIGURE 1.1-1 FUNCTIONAL DESCRIPTION
..................................................................................................... 6
1.2
Board Control Register.................................................................................................................................................. 7
1.3
Board Status Register.................................................................................................................................................... 7
1.4
Sync Word Selection Registers ................................................................................................................................... 7
1.5
Data Reception ............................................................................................................................................................... 7
1.6
Data Transmission ......................................................................................................................................................... 7
1.7
Error Detection................................................................................................................................................................ 7
1.8
Interrupts ......................................................................................................................................................................... 7
CHAPTER 2: LOCAL SPACE REGISTERS
..........................................................................................................9
2.0
Register Map................................................................................................................................................................... 9
TABLE 2.0-1 PCI-SIO4 REGISTER ADDRESS MAP
......................................................................................... 9
2.1
Bit Map For Local Space Registers ........................................................................................................................... 10
2.1.0
Firmware Revision: (LOC 0x00)
........................................................................................................................
10
2.1.1
Board Control: (LOC 0x04)
................................................................................................................................
10
2.1.2
Clock Control: (LOC 0x0C)
................................................................................................................................
11
2.1.4
Channel 1 Tx Almost: (LOC 0x10)
...................................................................................................................
12
2.1.5
Channel 1 Rx Almost: (LOC 0x14)
....................................................................................................................
12
2.1.6
Channel 1 FIFO: (LOC 0x18)
..............................................................................................................................
12
2.1.7
Channel 1 Control Status: (LOC 0x1C)
............................................................................................................
12
2.1.8
Channel 2 Tx Almost: (LOC 0x20)
....................................................................................................................
14
2.1.9
Channel 2 Rx Almost: (LOC 0x24)
....................................................................................................................
14
2.1.10
Channel 2 FIFO: (LOC 0x28)
..............................................................................................................................
14
2.1.11
Channel 2 Control/Status: (LOC 0x2C)
...........................................................................................................
14
2.1.12
Channel 3 Tx Almost: (LOC 0x30)
....................................................................................................................
16
2.1.13
Channel 3 Rx Almost: (LOC 0x34)
....................................................................................................................
16
2.1.14
Channel 3 FIFO: (LOC 0x38)
..............................................................................................................................
16
2.1.15
Channel 3 Control/Status: (LOC 0x3C)
............................................................................................................
16
2.1.16
Channel 4 Tx Almost: (LOC 0x40)
....................................................................................................................
17
2.1.17
Channel 4 Rx Almost: (LOC 0x44)
....................................................................................................................
17
2.1.18
Channel 4 FIFO: (LOC 0x48)
..............................................................................................................................
18
2.1.19
Channel 4 Control/Status: (LOC 0x4C)
............................................................................................................
18
2.1.20
Channel 1 Sync Detected: (LOC 0x50)
.............................................................................................................
19
2.1.21
Channel 2 Sync Detected: (LOC 0x54)
.............................................................................................................
19
2.1.22
Channel 3 Sync Detected: (LOC 0x58)
.............................................................................................................
19
2.1.23
Channel 4 Sync Detected: (LOC 0x5C)
............................................................................................................
20
2.1.24
Interrupt Control: (LOC 0x60)
...........................................................................................................................
20
2.1.25
Interrupt Status: (LOC 0x64)
.............................................................................................................................
20
2.2
Usc Registers ............................................................................................................................................................... 21
2.2.1
Channel 1 USC: (LOC 0x100 to 0x17E)
.............................................................................................................
21
2.2.2
Channel 2 USC: (LOC 0x200 to 0x27E)
.............................................................................................................
21
2.2.3
Channel 3 USC: (LOC 0x300 0x37E)
..................................................................................................................
21
2.2.4
Channel 4 USC: (LOC 0x400 to 0x47E)
.............................................................................................................
21
2.3
Serial Controller Registers.......................................................................................................................................... 22
2.3.1
Channel Command/Address Register (CCAR)
..............................................................................................
22
2.3.1.1
Low: (LOC 0xn00)...................................................................................................................................... 22
2.3.1.2
High: (LOC: 0xn01)..................................................................................................................................... 22
