Fujitsu FR Family FR60 Lite, User Manual, Page: 237 / 1038

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Chapter 16 Clock Supervisor
1.Overview Clock Supervisor
Chapter 16 Clock Supervisor
This section gives an overview of the Clock Supervisor. Purpose of the Clock Supervisor is the
supervision of the main and sub oscillation clock. In case of main oscillation clock failure the
Clock Supervisor control logic will take action, i.e. switching to an internal RC-oscillation clock,
depending on the operation mode set in the control register.
1. Overview Clock Supervisor
The Clock Supervisors purpose is the supervision of the main and sub oscillation clocks. In case of a clock failure
(main clock and/or sub-clock) it can be replaced by an on-chip RC-oscillation clock, depending on the
configuration.
If a clock the MCU currently uses, fails for a certain time (20-80 s for main clock / 160-640 s for sub-clock) the
MCU is reset and the reset cause can be checked after reset vector fetch.
If the sub-clock is failing while the MCU is in main clock mode reset can be delayed until the transition to sub-
clock mode or no reset will be initiated. The user can choose the behaviour with a control bit in the Clock
Supervisor Control Register.
There are two independent supervisors one for the main clock and one for the sub-clock. They can be enabled/
disabled seperately.
Main clock and sub-clock supervisor are disabled and re-enabled automatically if the corresponding oscillator is
disabled and re-enabled.
If the MCU changes to stop mode, the RC-oscillator is automatically disabled. It will be enabled again upon wake-
up from stop mode.
There are two status bits in the Clock Supervisor Control Register which indicate the failure of the main clock and
sub-clock. These bits can be available at two port pins (device dependent).
Single clock devices can use the RC-oscillation clock as sub-clock.
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