2.2.1 NOR flash memory
The LS1043ARDB has a Micron NOR flash memory (MT28EW01G) with 128 MB size
and 16-bit data bus. The NOR flash memory is powered from a 3.3 V power supply but
the signals are driven with the 1.8 V I/O level. The NOR flash memory is controlled by
the NOR IFC machine.
Flash controls are explained below:
• IFC OE_B controls flash OE, whereas IFC WE0_B controls the flash WE_B signal.
• Flash RY/BY_B output signal shows the ready/busy status of the flash. This signal is
connected to the CPLD.
• IFC_NOR_CS_B driven by CPLD selects either IFC_CS0_B or IFC_CS1_B to the
NOR flash memory based on CFG_RCW_SRC[0:8].
CPLD-generated signals are used to re-arrange internal addresses according to user
configuration options CFG_RCW_SRC[0:8]. For details, see
.
2.2.2 NAND flash memory
The LS1043ARDB has an ONFI 1.0 compatible Micron NAND flash memory
(MT29F4G08ABBDAH4-ITX) with 512 MB size and 8-bit data bus. The NAND flash
memory is powered from a 1.8 V power supply. It has signals going to and coming from
the LS1043A processor directly. The NAND flash memory is controlled by the LS1043A
IFC FCM machine.
Flash controls are explained below:
• Flash R/B_B output indicates the status of the NAND operation. This open drain
output connects to complex programmable logic device (CPLD).
• IFC_NAND_CS_B from CPLD drives the NAND flash according to
CFG_RCW_SRC[0:8]. For details, see
2.3 Serial interfaces
The LS1043ARDB has several serial interfaces, such as RS-232, DSPI, eSDHC/eMMC,
and I2C. This section describes the following main serial interfaces used in the
LS1043ARDB:
•
•
•
Serial interfaces
QorIQ LS1043A Reference Design Board Reference Manual, Rev. 0, 08/2015
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Freescale Semiconductor, Inc.
