Enhanced Multiply-Accumulate Unit (EMAC)
Freescale Semiconductor
4-15
•
The optional 1-bit shift of the product is specified using the notation {<< | >>} SF, where <<1
indicates a left shift and >>1 indicates a right shift. The shift is performed before the product is
added to or subtracted from the accumulator. Without this operator, the product is not shifted. If the
EMAC is in fractional mode (MACSR[F/I] is set), SF is ignored and no shift is performed. Because
a product can overflow, the following guidelines are implemented:
— For unsigned word and longword operations, a zero is shifted into the product on right shifts.
— For signed, word operations, the sign bit is shifted into the product on right shifts unless the
product is zero. For signed, longword operations, the sign bit is shifted into the product unless
an overflow occurs or the product is zero, in which case a zero is shifted in.
— For all left shifts, a zero is inserted into the lsb position.
The following pseudocode explains basic MAC or MSAC instruction functionality. This example is
presented as a case statement covering the three basic operating modes with signed integers, unsigned
integers, and signed fractionals. Throughout this example, a comma-separated list in curly brackets, {},
indicates a concatenation operation.
switch (MACSR[6:5])
/* MACSR[S/U, F/I] */
{
case 0:
/* signed integers */
if (MACSR.OMC == 0 || MACSR.PAVn == 0)
then {
MACSR.PAVn = 0
/* select the input operands */
if (sz == word)
then {if (U/Ly == 1)
then operandY[31:0] = {sign-extended Ry[31], Ry[31:16]}
else operandY[31:0] = {sign-extended Ry[15], Ry[15:0]}
if (U/Lx == 1)
then operandX[31:0] = {sign-extended Rx[31], Rx[31:16]}
else operandX[31:0] = {sign-extended Rx[15], Rx[15:0]}
}
else {operandY[31:0] = Ry[31:0]
operandX[31:0] = Rx[31:0]
}
/* perform the multiply */
product[63:0] = operandY[31:0] * operandX[31:0]
/* check for product overflow */
if ((product[63:39] != 0x0000_00_0) and and (product[63:39] != 0xffff_ff_1))
then {
/* product overflow */
MACSR.PAVn = 1
MACSR.V = 1
if (inst == MSAC and and MACSR.OMC == 1)
then if (product[63] == 1)
then result[47:0] = 0x0000_7fff_ffff
else result[47:0] = 0xffff_8000_0000
else if (MACSR.OMC == 1)
then /* overflowed MAC,
saturationMode enabled */
if (product[63] == 1)
then result[47:0] = 0xffff_8000_0000
else result[47:0] = 0x0000_7fff_ffff
}
MCF5329 Reference Manual, Rev 3
Summary of Contents for MCF5329
Page 106: ...ColdFire Core 3 32 Freescale Semiconductor MCF5329 Reference Manual Rev 3...
Page 148: ...Cache 5 22 Freescale Semiconductor MCF5329 Reference Manual Rev 3...
Page 154: ...Static RAM SRAM 6 6 Freescale Semiconductor MCF5329 Reference Manual Rev 3...
Page 184: ...Power Management 8 18 Freescale Semiconductor MCF5329 Reference Manual Rev 3...
Page 204: ...Reset Controller Module 10 8 Freescale Semiconductor MCF5329 Reference Manual Rev 3...
Page 220: ...System Control Module SCM 11 16 Freescale Semiconductor MCF5329 Reference Manual Rev 3...
Page 228: ...Crossbar Switch XBS 12 8 Freescale Semiconductor MCF5329 Reference Manual Rev 3...
Page 268: ...General Purpose I O Module 13 40 Freescale Semiconductor MCF5329 Reference Manual Rev 3...
Page 392: ...SDRAM Controller SDRAMC 18 30 Freescale Semiconductor MCF5329 Reference Manual Rev 3...
Page 436: ...Fast Ethernet Controller FEC 19 44 Freescale Semiconductor MCF5329 Reference Manual Rev 3...
Page 594: ...FlexCAN 23 30 Freescale Semiconductor MCF5329 Reference Manual Rev 3...
Page 678: ...Pulse Width Modulation PWM Module 26 22 Freescale Semiconductor MCF5329 Reference Manual Rev 3...
Page 684: ...Watchdog Timer Module 27 6 Freescale Semiconductor MCF5329 Reference Manual Rev 3...
Page 704: ...DMA Timers DTIM0 DTIM3 29 12 Freescale Semiconductor MCF5329 Reference Manual Rev 3...
Page 754: ...UART Modules 31 34 Freescale Semiconductor MCF5329 Reference Manual Rev 3...
Page 770: ...I2 C Interface 32 16 Freescale Semiconductor MCF5329 Reference Manual Rev 3...
Page 866: ...Debug Module 36 50 Freescale Semiconductor MCF5329 Reference Manual Rev 3...