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45.5 API Interface Level

caamalg module provides a connection through the Scatterlist Crypto API both for
common symmetric blockciphers, and for single-pass authentication-encryption services.
This table lists all installed authentication-encryption algorithms by their common name,
driver name, and purpose. Note that certain platforms, such as i.MX 6, contain a low-
power MDHA accelerator, which cannot support SHA384 or SHA512.

Name

Driver Name

Purpose

authenc(hmac(md5),cbc(aes))

authenc-hmac-md5-cbc-aescaam

Single-pass authentication/encryption
using MD5 and AES-CBC

authenc(hmac(sha1),cbc(aes))

authenc-hmac-sha1-cbc-aescaam

Single-pass authentication/encryption
using SHA1 and AES-CBC

authenc(hmac(sha224),cbc(aes))

authenc-hmac-sha224-cbcaes-caam

Single-pass authentication/encryption
using SHA224 and AES-CBC

authenc(hmac(sha256),cbc(aes))

authenc-hmac-sha256-cbcaes-caam

Single-pass authentication/
encryptionusing SHA256 and AES-CBC

authenc(hmac(sha384),cbc(aes))

authenc-hmac-sha384-cbcaes-caam

Single-pass authentication/encryption
using SHA384 and AES-CBC

authenc(hmac(sha512),cbc(aes))

authenc-hmac-sha512-cbcaes-caam

Single-pass authentication/encryption
using SHA512 and AES-CBC

authenc(hmac(md5),cbc(des3_ede))

authenc-hmac-md5-cbcdes3_ede-caam Single-pass authentication/encryption

using MD5 and Triple-DES-CBC

authenc(hmac(sha1),cbc(des3_ede))

authenc-hmac-sha1-cbcdes3_ede-caam Single-pass authentication/encryption

using SHA1 and Triple-DES-CBC

authenc(hmac(sha224),cbc(des3_ede))

authenc-hmac-sha224-cbcdes3_ede-
caam

Single-pass authentication/encryption
using SHA224 and Triple-DES-CBC

authenc(hmac(sha256),cbc(des3_ede))

authenc-hmac-sha256-cbcdes3_ede-
caam

Single-pass authentication/encryption
using SHA256 and Triple-DES-CBC

authenc(hmac(sha384),cbc(des3_ede))

authenc-hmac-sha384-cbcdes3_ede-
caam

Single-pass authentication/encryption
using SHA384 and Triple-DES-CBC

authenc(hmac(sha512),cbc(des3_ede))

authenc-hmac-sha512-cbc-des3_ede-
caam

Single-pass authentication/encryption
using SHA512 and Triple-DES-CBC

authenc(hmac(md5),cbc(des))

authenc-hmac-md5-cbc-descaam

Single-pass authentication/encryption
using MD5 and Single-DES-CBC

authenc(hmac(sha1),cbc(des))

authenc-hmac-sha1-cbc-descaam

Single-pass authentication/encryption
using SHA1 and Single-DES-CBC

authenc(hmac(sha224),cbc(des))

authenc-hmac-sha224-cbcdes-caam

Single-pass authentication/encryption
using SHA224 and Single-DES-CBC

authenc(hmac(sha256),cbc(des))

authenc-hmac-sha256-cbcdes-caam

Single-pass authentication/encryption
using SHA256 and Single-DES-CBC

authenc(hmac(sha384),cbc(des))

authenc-hmac-sha384-cbcdes-caam

Single-pass authentication/encryption
using SHA384 and Single-DES-CBC

authenc(hmac(sha512),cbc(des))

authenc-hmac-sha512-cbcdes-caam

Single-pass authentication/encryption
using SHA512 and Single-DES-CBC

API Interface Level

i.MX 6Solo/6DualLite Linux Reference Manual, Rev. L3.0.35_4.1.0, 09/2013

314

Freescale Semiconductor, Inc.

Summary of Contents for i.MX 6DualLite

Page 1: ...i MX 6Solo 6DualLite Linux Reference Manual Document Number IMX6SDLLXRM Rev L3 0 35_4 1 0 09 2013...

Page 2: ...i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 2 Freescale Semiconductor Inc...

Page 3: ...re Operation 34 3 2 2 Interrupt Software Operation 34 3 2 3 Interrupt Features 35 3 2 4 Interrupt Source Code Structure 35 3 2 5 Interrupt Programming Interface 35 3 3 Timer 36 3 3 1 Timer Software Op...

Page 4: ...GPIO Software Operation general 41 3 5 6 3 GPIO Implementation 41 3 5 6 4 GPIO Source Code Structure 42 3 5 6 5 GPIO Programming Interface 42 3 6 General Purpose Input Output GPIO 42 3 6 1 GPIO Softw...

Page 5: ...ntroduction 53 6 2 Hardware Operation 55 6 3 Software Operation 55 6 3 1 Overview of IPU Frame Buffer Drivers 56 6 3 1 1 IPU Frame Buffer Hardware Operation 57 6 3 1 2 IPU Frame Buffer Software Operat...

Page 6: ...ptions 74 7 3 3 Programming Interface 74 Chapter 8 Video for Linux Two V4L2 Driver 8 1 Introduction 75 8 2 V4L2 Capture Device 76 8 2 1 V4L2 Capture IOCTLs 76 8 2 2 Using the V4L2 Capture APIs 78 8 3...

Page 7: ...ling An EPDC Splash Screen 89 9 4 Source Code Structure 90 9 5 Menu Configuration Options 90 9 6 Programming Interface 91 9 6 1 IOCTLs Functions 91 9 6 2 Structures and Defines 94 Chapter 10 Pixel Pip...

Page 8: ...Software Operation 105 12 2 1 DirectFB Acceleration Architecture 106 12 2 2 i MX DirectFB Driver Details 107 12 2 3 The gal_config File for i MX DirectFB Driver 107 12 3 DirectFB EGL 109 12 4 Setting...

Page 9: ...Rendering Infrastructure DRI for X Windows System 127 14 3 4 EGL X Library 128 14 3 5 xorg conf for i MX 6 128 14 3 6 Setup X Windows System Acceleration 130 Chapter 15 Video Processing Unit VPU Driv...

Page 10: ...on 144 17 2 Software Operation 144 17 2 1 MIPI CSI2 Driver Initialize Operation 144 17 2 2 MIPI CSI2 Common API Operation 145 17 3 Driver Features 145 17 3 1 Source Code Structure 146 17 3 2 Menu Conf...

Page 11: ...iver 20 1 Introduction 159 20 1 1 Software Operation 159 20 1 2 Source Code Structure 160 20 2 Menu Configuration Options 160 20 2 1 Board Configuration Options 161 Chapter 21 Dynamic Bus Frequency Dr...

Page 12: ...2 Driver Features 170 23 2 1 Software Operation 170 23 2 2 Regulator APIs 170 23 2 3 Driver Interface Details 171 23 2 4 Source Code Structure 171 23 2 5 Menu Configuration Options 171 Chapter 24 SNVS...

Page 13: ...tion 183 25 4 1 ASoC Driver Source Architecture 184 25 4 2 Sound Card Registration 185 25 4 3 Device Open 185 25 4 4 Platform Data 186 25 4 5 Menu Configuration Options 186 25 5 Unit Test 187 25 5 1 S...

Page 14: ...27 2 1 Driver Design 200 27 2 2 Provided User Interface 200 27 3 S PDIF Rx Driver 201 27 3 1 Driver Design 202 27 3 2 Provided User Interfaces 202 27 4 Source Code Structure 204 27 5 Menu Configurati...

Page 15: ...218 29 2 5 Loadable Module Operations 219 Chapter 30 NAND GPMI Flash Driver 30 1 Introduction 221 30 1 1 Hardware Operation 221 30 2 Software Operation 221 30 2 1 Basic Operations Read Write 222 30 2...

Page 16: ...Introduction 231 32 1 1 Hardware Operation 231 32 2 Software Operation 232 32 2 1 SPI Sub System in Linux 232 32 2 2 Software Limitations 233 32 2 3 Standard Operations 233 32 2 4 ECSPI Synchronous Op...

Page 17: ...46 34 4 Menu Configuration Options 246 Chapter 35 ARC USB Driver 35 1 Introduction 247 35 1 1 Architectural Overview 247 35 2 Hardware Operation 248 35 2 1 Software Operation 248 35 2 2 Source Code St...

Page 18: ...rupt lines 263 36 4 Using PCIe Endpoint and running Tests 264 36 4 1 Ensuring PCIe System Initialization 265 36 4 2 Tests 265 36 4 3 Known Issues 266 36 5 i MX 6Quad SD PCIe RC EP Validation System 26...

Page 19: ...ructure Defines 279 38 3 2 IXXAT IOCTL Commands Defines 280 Chapter 39 Universal Asynchronous Receiver Transmitter UART Driver 39 1 Introduction 283 39 2 Hardware Operation 284 39 2 1 Software Operati...

Page 20: ...Control 294 41 2 2 Reset and Power control 295 41 2 3 Configuration 295 Chapter 42 Pulse Width Modulator PWM Driver 42 1 Introduction 297 42 1 1 Hardware Operation 297 42 1 2 Clocks 298 42 1 3 Softwa...

Page 21: ...stem 307 44 2 3 Generic Kernel Driver 307 44 2 4 OProfile Daemon 307 44 2 5 Post Profiling Tools 308 44 3 Requirements 308 44 3 1 Source Code Structure 308 44 3 2 Menu Configuration Options 308 44 3 3...

Page 22: ...the Keystore 320 45 14 Load Data into a Keystore Slot 321 45 15 Demo Image Update 321 45 16 Decapsulate Data in the Keystore 322 45 17 Read Data From a Keystore Slot 323 45 18 Release a Slot back to t...

Page 23: ...and directory names Italic type indicates replaceable command or function parameters Bold type indicates function names 1 1 2 Definitions Acronyms and Abbreviations The following table defines the acr...

Page 24: ...Standards United States Government technical standards published by the National Institute of Standards and Technology NIST NIST develops FIPS when there are compelling Federal government requirements...

Page 25: ...ity data storage NAND flash devices offer storage space up to 512 Mbyte and offers faster erase write and read capabilities over NOR architecture NOR Flash See NAND Flash PCMCIA Personal Computer Memo...

Page 26: ...UID Unique ID a field in the processor and CSF identifying a device or group of devices USB Universal Serial Bus an external bus standard that supports high speed data transfers The USB 1 1 specifica...

Page 27: ...nents Java Virtual Machine JVM and applications required for a product Some of these are made available in their original open source form as part of the base kernel The BSP is not intended to be used...

Page 28: ...the API to allow different masters to take or release ownership of a shared peripheral Machine Specific Layer MSL All SDMA API The Smart Direct Memory Access SDMA API driver controls the SDMA hardwar...

Page 29: ...i MX 6Solo 6DualLite V4L2 Capture The Video for Linux 2 V4L2 capture device includes two interfaces the capture interface and the overlay interface The capture interface records the video stream The o...

Page 30: ...erface with the I2C bus This driver is invoked by the I2C chip driver it is not exposed to the user space The standard Linux kernel contains a core I2C module that is used by the chip driver to access...

Page 31: ...Rate Converter ASRC Driver i MX 6Solo 6DualLite WatchDog The Watchdog Timer module protects against system failures by providing an escape from unexpected hang or infinite loop situations or programmi...

Page 32: ...Overview i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 32 Freescale Semiconductor Inc...

Page 33: ...ns not only the modules common to all the boards using the same processor such as the interrupts and timer but it also contains modules specific to each board such as the memory map The following sect...

Page 34: ...There are 16 normal interrupt levels for all interrupt sources with level zero being the lowest priority The interrupt levels are configurable through eight normal interrupt priority level registers T...

Page 35: ...f this chapter hardware h irqs h The following table lists the source files for interrupts Table 3 1 Interrupt Files File Description hardware h Register descriptions irqs h Declarations for number of...

Page 36: ...atistics The timer hardware on most i MX platforms consists of either Enhanced Periodic Interrupt Timer EPIT or general purpose timer GPT or both GPT is configured to generate a periodic interrupt at...

Page 37: ...f this chapter 3 4 Memory Map A predefined virtual to physical memory map table is required for the device drivers to access to the device registers since the Linux kernel is running under the virtual...

Page 38: ...emory Map is implemented in the mm c file to provide the map between physical and virtual addresses It defines an initialization function to be called during system startup 3 5 IOMUX The limited numbe...

Page 39: ...pting the ARM core it should be configured as GPIO input pin with interrupt enabled The software does not have control over what function a pin should have The software only configures pin usage accor...

Page 40: ...mented in the iomux v3 c file 3 5 6 IOMUX Control Through GPIO Module For a multi purpose pin the GPIO controller provides the multiplexing control so that each pin may be configured either as a funct...

Page 41: ...the system design 3 5 6 1 GPIO Hardware Operation The GPIO controller module is divided into MUX control and PULLUP control sub modules The following sections briefly describe the hardware operation F...

Page 42: ...the GPIO muxing functions required for the Linux port are implemented in the iomux v3 c file 3 6 General Purpose Input Output GPIO The GPIO module provides general purpose pins that can be configured...

Page 43: ...by NR_IRQS is expanded to accommodate all the possible GPIO pins that are capable of generating interrupts Functions to request and free an IOMUX pin If a pin is used as GPIO another set of request fr...

Page 44: ...s File Description iomux mx h IOMUX common header file gpio h GPIO public header file gpio c Function implementation 3 6 4 GPIO Programming Interface 2 For more information see the Documentation gpio...

Page 45: ...MA controller is responsible for transferring data between the MCU memory space and peripherals It has the following features Multi channel DMA supporting up to 32 time division multiplexed DMA channe...

Page 46: ...l 1 Upon finding a free channel that channel is allocated for the requested DMA transfers Table 4 1 SDMA Channel Usage Driver Name Number of SDMA Channels SDMA Channel Used SDMA CMD 1 Static Channel a...

Page 47: ...API driver In menuconfig this option is available under DMA Engine support 4 1 5 Programming Interface The module implements standard DMA API For more information on the functions implemented in the...

Page 48: ...Overview i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 48 Freescale Semiconductor Inc...

Page 49: ...he DMA uses the APBH bus and the AHB to APB bridge functions use the APBH For conflict between these two units the DMA is master and the AHB is standby which will report not ready through its HREADY o...

Page 50: ...ependent channel to follow a simple chained command list Command chains are built up by using the general structure Table 5 1 APBH DMA Channel Assignments APBH DMA Channel Usage 0 GPMI0 1 GPMI1 2 GPMI...

Page 51: ...MA API For more information on the functions implemented in the driver such as GPMI NAND driver refer to the API documents which are located in the Linux documentation package 5 1 6 Usage Example Refe...

Page 52: ...Overview i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 52 Freescale Semiconductor Inc...

Page 53: ...tput and one secondary input IDMA channel The IPU API consists of a set of common functions for all channels It aims to initialize channels set up buffers enable and disable channels link channels for...

Page 54: ...d are specific to an IPU sub module The types of functions for the IPU sub modules are as follows Synchronous frame buffer functions Panel interface initialization Set foreground positions Set local g...

Page 55: ...er module in the Linux kernel It consists of a custom kernel level API for the following blocks Synchronous frame buffer driver Display Interface DI Display Processor DP Image DMA Controller IDMAC CMO...

Page 56: ...ir rpm BUILD linux drivers video mxc directory of the Linux kernel The V4L2 device drivers are available in the ltib_dir rpm BUILD linux drivers media video directory of the Linux kernel The MXC displ...

Page 57: ...6 3 1 1 IPU Frame Buffer Hardware Operation The frame buffer interacts with the IPU hardware driver module 6 3 1 2 IPU Frame Buffer Software Operation A frame buffer device is a memory device such as...

Page 58: ...l video driver that interacts with kernel and user level applications This is enabled by selecting the Synchronous Panel Frame buffer option under the graphics support device drivers in the kernel con...

Page 59: ...user space The default backlight intensity value is 128 6 3 3 IPU Device Driver IPU processing device driver provide image processing features including resizing rotation CSC combination and deinterl...

Page 60: ...need combine and task output parameters and then queue task either by int ipu_queue_task struct ipu_task task if from kernel level v4l2 driver for example or by IPU_QUEUE_TASK ioctl under dev mxc_ipu...

Page 61: ...by ipu_device c Table 6 2 lists the global header files associated with the IPU and Panel drivers These files are available in the following directories ltib_dir rpm BUILD linux drivers mxc ipu3 ltib...

Page 62: ...ly one sensor should be installed at a time CONFIG_MXC_CAMERA_OV5642 option for both the OV5642 sensor driver and the use case driver This option is dependent on the MXC_IPU option In menu configurati...

Page 63: ...r Encoder library By default this option is set to M for all CONFIG_VIDEO_MXC_CAMERA option for V4L2 capture Driver This option is dependent on the following expression VIDEO_DEV MXC_IPU MXC_IPU_PRP_V...

Page 64: ...default this option is Y for all architectures CONFIG_FB_MXC_LDB selects the LVDS module on iMX53 chip This option is dependent on CONFIG_FB_MXC_SYNC_PANEL and CONFIG_MXC_IPU_V3 option In menu configu...

Page 65: ...t mxc_v4l2_test directory Before running the v4l2 capture test application make sure that the dev v4l video0 is created Test ID FSL UT V4L2 capture 0010 mxc_v4l2_capture out iw 640 ih 480 m 0 r 0 c 50...

Page 66: ...out iw 640 ih 480 ow 1024 oh 768 r 0 fr 60 test yuv Read the YUV420 stream file on test yuv created by the mxc_v4l2_capture test as run in test FSL UT V4L2 capture 0010 Apply color space conversion an...

Page 67: ...IPU_PIX_FMT_RGB24 case IPU_PIX_FMT_YUV444 bpp 24 break case IPU_PIX_FMT_BGR32 case IPU_PIX_FMT_BGRA32 case IPU_PIX_FMT_RGB32 case IPU_PIX_FMT_RGBA32 case IPU_PIX_FMT_ABGR32 bpp 32 break non interleave...

Page 68: ...40 task input crop pos x 0 task input crop pos y 0 task input crop w 0 task input crop h 0 task input format IPU_PIX_FMT_YUV420P isize task input paddr task input width task input height fmt_to_bpp ta...

Page 69: ...FBIOGET_VSCREENINFO fb_var fb_var xres task output width fb_var xres_virtual fb_var xres fb_var yres task output height fb_var yres_virtual fb_var yres 3 fb_var activate FB_ACTIVATE_FORCE fb_var nons...

Page 70: ...U_FREE task overlay paddr close fd close fd_fb fclose file_in NOTE The overlay width and height must be the same as those of the output For example if the input is 240x320 and the output is 1024x768 w...

Page 71: ...mebuffer event notifier for blank unblank operation Additionally the driver initializes MIPI D PHY and configures the MIPI DSI IP according to the MIPI DSI display panel The MIPI DSI driver supports t...

Page 72: ...r pins compared with legacy parallel bus It is designed to be compatible with the standard MIPI DSI protocol MIPI DSI is built on exisiting MIPI DPI 2 MIPI DBI 2 and MIPI DCS standards It sends pixels...

Page 73: ...high speed data links for display When there is an framebuffer blank unblank event the registered notifier will be called to enter or leave low power mode The MIPI DSI IP driver provides three APIs fo...

Page 74: ...ration Options Device Drivers Graphics support MXC Framebuffer support Synchronous Panel Framebuffer MXC MIPI_DSI 7 3 3 Programming Interface The MIPI DSI Display Panel driver can use the API interfac...

Page 75: ...lor keying or alpha blending of frame buffer and overlay planes Streaming queued capture from IPU encoding channel Direct raw Bayer still capture sensor dependent Programmable pixel format size frame...

Page 76: ...this device are located in ltib_dir rpm BUILD linux drivers media video mxc capture The V4L2 capture device driver is in the mxc_v4l2_capture c file The low level overlay driver is in the ipu_fg_over...

Page 77: ...to provide support for rotation The ID is V4L2_CID_PRIVATE_BASE Supported values include 0 Normal operation 1 Vertical flip 2 Horizontal flip 3 180 rotation 4 90 rotation clockwise 5 90 rotation clock...

Page 78: ...ames is 3 4 Memory maps the buffer to its user space 5 Queues buffers using the IOCTL command VIDIOC_QBUF 6 Starts the stream by using the IOCTL VIDIOC_STREAMON This IOCTL enables the IPU tasks and th...

Page 79: ...tput Device The V4L2 output driver uses the IPU post processing functions for video output The driver implements the standard V4L2 API for output devices V4L2 output device support can be selected dur...

Page 80: ...driver creates a chain of buffers not allocated yet 5 Memory maps the buffer to its user space 6 Executes IOCTL VIDIOC_QUERYBUF to query buffers 7 Passes the data that requires post processing to the...

Page 81: ...ronous background driver capture ipu_still c Pre processing still image capture driver Drivers for specific cameras can be found in ltib_dir rpm BUILD linux drivers media video mxc capture Drivers for...

Page 82: ...Source Code Structure i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 82 Freescale Semiconductor Inc...

Page 83: ...rt for EPDC driver as a loadable or built in module Support for RGB565 and Y8 frame buffer formats Support for full and partial EPD screen updates Support for up to 256 panel specific waveform modes S...

Page 84: ...er Overview The frame buffer device provides an abstraction for the graphics hardware It represents the frame buffer video hardware and allows application software to access the graphics hardware thro...

Page 85: ...reen update latencies between 300 980ms which introduces the need for a mechanism to allow the user to wait for a given screen update to complete The custom API extensions to the frame buffer device a...

Page 86: ...num_modes void get_pins void void put_pins void void enable_pins void void disable_pins void In addition to the EPDC panel mode data functions may be passed to the EPDC driver to define how to handle...

Page 87: ...on panel specific waveform file for an E Ink panel results in more ghosting artifacts and overall poorer color quality The following default waveform files included in the BSP reside in firmware imx e...

Page 88: ...irmware sh You ll need to create an imx directory in one of these paths and add your new epdc_ panel_name fw file there NOTE If the EPDC driver is searching for a firmware waveform file that matches t...

Page 89: ...the framebuffer format There are two key members of the fb_var_screeninfo parameter that must be set in order to request a change to 8 bit grayscale format bits_per_pixel and grayscale bits_per_pixel...

Page 90: ...for the EPDC module Table below lists the global header files associated with the EPDC driver These files are available in the following directory include linux Table 9 2 EPDC Global Header Files Fil...

Page 91: ...In menuconfig this option is available under Device Drivers Graphics support MXC Framebuffer support By default this option is Y for all architectures CONFIG_MXC_PXP enables support for the PxP The Px...

Page 92: ...the temperature value parameter to anything other than TEMP_USE_AMBIENT when using the MXCFB_SEND_UPDATE ioctl MXCFB_SET_AUTO_UPDATE_MODE mxc_epdc_fb_set_auto_update Description Select between automat...

Page 93: ...pdate was sent to the driver UPDATE_SCHEME_QUEUE_AND_MERGE The Queue and Merge scheme uses the queueing concept from the Queue scheme but adds a merging step This means that before an update is proces...

Page 94: ...was a collision test update the collision_test variable will return the result indicating whether a collision occurred MXCFB_SET_PWRDOWN_DELAY mxc_epdc_fb_set_pwrdown_delay Description Set the delay b...

Page 95: ...int mode_du DU waveform mode int mode_gc4 GC4 waveform mode int mode_gc8 GC8 waveform mode int mode_gc16 GC16 waveform mode int mode_gc32 GC32 waveform mode struct mxcfb_alt_buffer_data __u32 phys_ad...

Page 96: ...Programming Interface i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 96 Freescale Semiconductor Inc...

Page 97: ...rence Manual 10 3 Software Operation 10 3 1 Key Data Structs The PxP DMA Engine driver implementation depends on the DMA Engine Framework There are three important structs in the DMA Engine Framework...

Page 98: ...re 16 virtual channels are supported in the driver this provides flexibility in the multiple instance client design At any time a user can call dma_request_channel to get a free channel and then confi...

Page 99: ...stead of using the scatterlist parameter object to provide a chain of memory sources and destinations the driver currently uses it to provide the input and output buffers and overlay buffers if needed...

Page 100: ...Source Code Structure i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 100 Freescale Semiconductor Inc...

Page 101: ...oftware and hardware support EGL EGL is an interface between Khronos rendering APIs such as OpenGL ES or OpenVG and the underlying native platform window system 1 4 API defined by Khronos Group OpenGL...

Page 102: ...providing the following APIs to the upper layer applications OpenGL ES 1 1 and 2 0 API EGL 1 4 API OpenVG 1 1 API 11 1 1 3 Source Code Structure Table below lists GPU driver kernel module source struc...

Page 103: ...gfxdrivers libdirectfb_gal so DirectFB 2D acceleration library dri vivante_dri so DRI library for OpenGL2 1 These libraries are actually symbolic links to the actual library file in the folder By def...

Page 104: ...figuration this option is available under Device Drivers MXC support drivers MXC Vivante GPU support MXC Vivante GPU support To get to the GPU library package in LTIB use the command ltib c when locat...

Page 105: ...DirectFB acceleration uses the Vivante GPU The process is described in the Driver Features Acceleration is also dependent on the frame buffer memory 12 2 Software Operation The DirectFB version which...

Page 106: ...on Architecture Figure 12 2 DirectFB Acceleration Architecture Details Systems provides frame buffer and hardware management to access to the resources Software Operation i MX 6Solo 6DualLite Linux Re...

Page 107: ...input devices can be locked for exclusive access for example for fullscreen games DirectFB provides abstraction for the different graphics targets such as display layers windows and any general purpos...

Page 108: ...none xor blend fillrectangle none xor blend filltriangle none xor blend blit none xor alphachannel coloralpha src_colorkey rotate180 stretchblit none xor alphachannel coloralpha src_colorkey rotate180...

Page 109: ...2 Cross compile DirectFB and their examples You can do it by using the toolchain and follow the instructions in the DirectFB 1 4 0 package or have LTIB to do it all recommended The next steps use LTIB...

Page 110: ...drivers mxc gpu viv galcore ko before trying to run DirectFB applications To run the DFB examples run usr bin df_dok It will perform a series of benchmarks and show the results but they require settin...

Page 111: ...ures Integration with the MXC Display Device framework used for managing display device connections with the IPU s HDMI video output up to 1080p60 resolution Support for reading EDID information from...

Page 112: ...source to query the HDMI sink for Extended Display Identification Data EDID A CEC channel provides optional high level control functions between the source and sink device Figure 13 1 HDMI HW Integra...

Page 113: ...ion of this interconnection Figure 13 2 IPU HDMI Hardware Interconnection 13 2 Software Operation The HDMI driver is divided into sub components based on its two primary purposes providing video and a...

Page 114: ...nts occur HDMI audio cannot start work while the HDMI cable is in the state of plug out or HDMI is in state of blank Every time HDMI audio starts a playback HDMI audio driver should register its PCM i...

Page 115: ...g this API to receive the correct video input from the IPU 13 2 3 Display Device Registration and Initialization The following sequence of software activities occurs in the OS boot flow to connect the...

Page 116: ...is connected and ready to receive HDMI video data Subsequent communications between the HDMI and IPU FB are conducted through the Linux Frame Buffer APIs The following list demonstrates the software f...

Page 117: ...header information into the audio stream so the platform DMA driver does this in its hdmi_dma_copy for no memory map use or hdmi_dma_mmap_copy for memory map mode use function before the DMA sends the...

Page 118: ...cludes getting Logical address CEC message sending and receiving error handle and message re transmitting Figure 13 4 HDMI CEC SW Architecture 13 3 Source Code Structure The bulk of the source code fo...

Page 119: ...able 13 3 HDMI Display Driver File List File Description mxc_hdmi c HDMI display driver implemention The source code for the HDMI audio driver is available in the ltib_dir rpm BUIL D linux drivers and...

Page 120: ...form device code devices platform mxc_hdmi c HDMI display driver platform device code devices platform imx hdmi soc c HDMI audio driver platform device code devices platform imx hdmi soc dai c HDMI au...

Page 121: ...f manual tests are required to verify the correct functionality For audio driver testing the aplay audio file player and iecset utility provide confirmation of the the driver s proper integration into...

Page 122: ...rds and determine the card number This is different on our various boards 3 For example if the hdmi ends up being card 2 use this command line to play out a pcm audio file file wav aplay Dplughw 2 0 f...

Page 123: ...s are accelerated for X Windows System 14 2 Hardware Operation X Windows System acceleration on i MX 6 uses the Vivante GC320 2D GPU Acceleration is also dependent on the frame buffer memory 14 3 Soft...

Page 124: ...he X Windows acceleration X pixmaps can be allocated directly in frame buffer memory EGL swap buffers where the EGL window surface is an X window X window can be composited into an X pixmap which can...

Page 125: ...r code The EGL X library module libEGL so contains the X Windows implementation of the low level EGL platform specific support functions This allows X window and X pixmap objects to be used as EGL win...

Page 126: ...xmap allocation for X through the EXA callback interface A first attempt is made to allocate the memory where it can be accessed by a physical GPU address This attempt may fail if there is insufficien...

Page 127: ...libraries and to the kernel DRM Direct Rendering Manager The most important function for the DRI is to create fast OpenGL and OpenGL ES implementations that render to framebuffer memory directly With...

Page 128: ...ack buffers used for double buffering can have different representations from the window surface based on the selected eglConfig An attempt is made to create each back buffer by using the representati...

Page 129: ...ecifies the unique name to associate with this graphics device Section Device Identifier i MX Accelerated Framebuffer Device The following entry ties a specific graphics device to a screen The Device...

Page 130: ...libEGL so libGLESv1_ so libGLESv2 so libGL so vivante_dri so library All above libraries are installed in the usr lib folder except vivante_dri so which is installed at usr lib dri xserver xorg video...

Page 131: ...4 228 II VIVANTE 0 FB Start 0x333a8000 FB Base 0x333a8000 FB Offset nil 34 228 II VIVANTE 0 test Initializing EXA 34 228 II EXA 0 Driver allocated offscreen pixmaps 34 229 II EXA 0 Driver registered s...

Page 132: ...Software Operation i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 132 Freescale Semiconductor Inc...

Page 133: ...stream parsing packeting Therefore the software takes advantage of less control and effort to implement a complex and efficient multimedia codec system The VPU hardware data flow is shown in the MPEG4...

Page 134: ...driver and the user space library as well as the application in user space The kernel driver takes responsibility for system control and reserving resources memory IRQ It provides an IOCTL interface H...

Page 135: ...allocating and releasing Memory map for register and memory accessing in user space Device Shutdown shuts down the VPU clock and hardware and releases the IRQ The VPU user space driver has the follow...

Page 136: ...on of VPU vpu_util c File implementing common utilities used by the codec vpu_util h Header file The following table lists the firmware files available in the following directories ltib_dir rpm BUILD...

Page 137: ...etOutputInfo EncHandle encHandle EncOutputInfo info RetCode vpu_EncGiveCommand EncHandle pHandle CodecCommand cmd void pParam RetCode vpu_DecOpen DecHandle pHandle DecOpenParam pop RetCode vpu_DecClos...

Page 138: ...dr physical memory get from system unsigned long cpu_addr address for system usage while freeing user doesn t need to handle or use it unsigned long virt_uaddr virtual user space address vpu_mem_desc...

Page 139: ...ng the camera getting images from camera and starting the camera preview The OV5640 uses the serial camera control bus SCCB interface to control the sensor operation It works as an I2C client V4L2 dri...

Page 140: ...Description ov5640_mipi c Camera driver implementation for ov5640 using MIPI CSI 2 interface 16 1 4 Linux Menu Configuration Options The following Linux kernel configuration option is provided for th...

Page 141: ...camera control bus SCCB interface to control the sensor operation It works as an I2C client V4L2 driver uses I2C bus to control camera operation OV5640 supports only parallel interface Refer to OV5640...

Page 142: ...nux kernel configuration option is provided for this module To get to this option use the ltib c command when located in the ltib dir On the displayed screen select Configure the Kernel and exit When...

Page 143: ...e for managing the mipi D PHY register and clock MIPI CSI 2 common API for communication between MIPI sensor and MIPI D PHY By calling MIPI common APIs MIPI sensor can set certain information about se...

Page 144: ...tes CSI 2 packet header information and reorders data according to memory storage format It also generates timing accurate video synchronization signals Several error detections are also performed at...

Page 145: ...irtual_channel get the virtual channel number by which mipi sensor will tansfer data to MIPI D PHY mipi_csi2_set_lanes set the lanes number by which mipi sensor will tansfer data to MIPI D PHY mipi_cs...

Page 146: ...ppears select the following options to enable this module Device Drivers MXC support drivers MXC MIPI Support MIPI CSI2 support 17 3 3 Programming Interface MIPI CSI2 Common APIs can only be called by...

Page 147: ...t_bind_csi Get the data type and virtual channel from MIPI CSI2 driver and configure the CSI module by calling mipi_csi2_get_datatype and mipi_csi2_get_virtual_channel Perform other configuration oper...

Page 148: ...Driver Features i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 148 Freescale Semiconductor Inc...

Page 149: ...On STOP Disable Disable Off Off On DORMANT Power off Disable Off Off On For the detailed information about lower power modes see the MCIMX 6DualLite Multimedia Applications Processor Reference Manual...

Page 150: ...ode 4 Execute mx6_do_suspend in IRAM 5 If it is in DORMANT mode save the ARM context change the drive strength of MMDC PADs to low to minimize the power leakage in DDR PADs Execute WFI pending instruc...

Page 151: ...ace The mxc_cpu_lp_set API in the system c function is provided for low power modes This implements all the steps required to put the system into WAIT and STOP modes 18 1 5 Unit Test To enter differen...

Page 152: ...Hardware Operation i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 152 Freescale Semiconductor Inc...

Page 153: ...he power supply to processor cores and to other low voltage circuits such as memory Dynamic voltage scaling is provided to allow controlled supply rail adjustments for the processor cores and other ci...

Page 154: ...es that use the power management driver and the regulator client driver can affect the operation or stability of the entire system 19 3 1 Regulator APIs The regulator power architecture is designed to...

Page 155: ...nabled is the regulator output enabled int regulator_is_enabled struct regulator regulator regulator_set_voltage is an unified API call to set regulator output voltage int regulator_set_voltage struct...

Page 156: ...of the PF100 regulator driver Regulator core driver PF100 regulator driver PF100 core driver MFD I2C or SPI driver Device drivers PF100 driver Driver Architecture i MX 6Solo 6DualLite Linux Reference...

Page 157: ...to the hardware design Therefore you cannot find the kernel by using PF100 regulators The PF100 regulator driver has implemented these regulators so that customers can use it freely if default PF100 v...

Page 158: ...When the next screen appears choose the following Device Drivers Voltage and Current regulator support Support regulators on Freescale PF100 PMIC Driver Architecture i MX 6Solo 6DualLite Linux Referen...

Page 159: ...are manipulated using the clock framework API while the voltage is set using the regulators API The CPU frequencies in the array are based on the boot CPU frequency which can be changed by using the...

Page 160: ...uency governor echo interactive sys devices system cpu cpu0 cpufreq scaling_governor 20 1 2 Source Code Structure Table below shows the source files and headers available in the following directory lt...

Page 161: ...or userspace frequency scaling Interactive CPU frequency policy governor Conservative CPU frequency governor CPU frequency driver for i MX CPUs 20 2 1 Board Configuration Options There are no board co...

Page 162: ...Menu Configuration Options i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 162 Freescale Semiconductor Inc...

Page 163: ...requency of the system clocks like AHB DDR AXI etc based on peripheral activity and CPU loading 21 1 2 Software Operation The bus frequency depends on the usecount of the various clocks in the system...

Page 164: ...le 21 1 3 Source Code Structure Table below lists the source files and headers available in the following directory ltib_dir rpm BUILD linux arch arm mach mx6 Table 21 1 BusFrequency Driver Files File...

Page 165: ...l the cooling actions Thermal driver has two parts Thermal zone defines trip points and monitors the SoC s temperature Cooling device takes the actions according to different trip points 22 1 1 Therma...

Page 166: ...Source Code Structure Table below shows the driver source files available in the directory ltib_dir rpm BUILD linux drivers mxc thermal Table 22 1 Thermal Driver Files File Description thermal c ther...

Page 167: ...rip_point_x_temp Here x can be 0 1 and 2 indicating critical hot and active trip point and the value of trip points should be critical hot active Then run some program to make SoC in heavy loading Whe...

Page 168: ...Unit Test i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 168 Freescale Semiconductor Inc...

Page 169: ...load interconnection and requirements Using seven LDO regulators the number of external supplies is greatly reduced If the backup coin and USB inputs are neglected the number of external supplies is r...

Page 170: ...to allow systems to dynamically control regulator output to save power and prolong battery life This applies to both voltage regulators where voltage output is controllable and current sinks where cu...

Page 171: ...natop hardware registers 23 2 4 Source Code Structure The Anatop regulator driver is located in the regulator device driver directory ltib_dir rpm BUILD linux drivers regulator Table 23 1 Anatop Power...

Page 172: ...support Anatop Regulator Support System Type Freescale MXC Implementations Internal LDO in i MX 6Quad and i MX 6DualLite bypass Driver Features i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_...

Page 173: ...enhanced security capabilities It provides an accurate and constant time regardless of the main system power state and without the need to use an external on board time source such as an external RTC...

Page 174: ..._SRTC_POW should remain active Usually these signals are connected to the PMIC and software can configure the PMIC registers to enable the SRTC clock source and power supply Generally when the main ba...

Page 175: ...ns 24 3 2 Menu Configuration Options To get to the SRTC driver use the command ltib c when located in the ltib dir On the displayed screen select Configure the kernel and exit When the next screen app...

Page 176: ...Driver Features i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 176 Freescale Semiconductor Inc...

Page 177: ...ystem on Chip ASoC layer is designed for SoC audio The overall project goal of the ASoC layer provides better ALSA support for embedded system on chip processors and portable audio CODECs The ASoC lay...

Page 178: ...sing digital mute ASoC signals the CODEC when to change power states Machine specific controls allows machines to add controls to the sound card for example volume control for speaker amp ALSA Sound D...

Page 179: ...basically splits an embedded audio system into 3 components Chapter 25 Advanced Linux Sound Architecture ALSA System on a Chip ASoC Sound Driver i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 3...

Page 180: ...rs are implemented by using SoC architecture These sound card drivers are built in independently The stereo sound card supports stereo playback and capture The 7 1 sound card supports up to eight chan...

Page 181: ...io formats Playback SNDRV_PCM_FMTBIT_S16_LE SNDRV_PCM_FMTBIT_S20_3LE SNDRV_PCM_FMTBIT_S24_LE Playback ASRC enabled SNDRV_PCM_FMTBIT_S16_LE SNDRV_PCM_FMTBIT_S24_LE Capture SNDRV_PCM_FMTBIT_S16_LE SNDRV...

Page 182: ...CODEC works in master mode and provides the BCLK and LRCLK The BCLK and LRCLK can be configured according to the audio sample rate The WM8962 ASoC CODEC driver exports the audio record playback mixer...

Page 183: ...oes not contain code that is specific to the target platform or machine The codec driver handles Codec DAI and PCM configuration Codec control I O using I2C Mixers and audio controls Codec audio opera...

Page 184: ...FM CODEC is connected to the CPU through the SSI interface imx ssi c registers the CPU DAI driver for the stereo ALSA SoC and configures the on chip SSI interface si4763 c registers the Tuner CODEC an...

Page 185: ...le channel CODEC ALSA SoC imx imx pcm h Header file for pcm driver imx imx esai c Platform DAI link for mutliple channel CODEC ALSA SoC imx imx esai h Header file for platform DAI link codecs cs42888...

Page 186: ...of mxc_audio_platform_data See header file for the details of more variables ssi_num indicates which SSI channel is used src_port indicates which AUDMUX port is connected with SSI ext_port indicates w...

Page 187: ...o support SoC Audio for the Freescale i MX CPU SoC Audio support for IMX SI4763 25 5 Unit Test This section shows how to use ALSA driver and assume the rootfs is GNOME 25 5 1 Stereo CODEC Unit Test St...

Page 188: ...The recording feature can be tested by following command arecord Dplughw 0 0 r 48000 f S16_LE c 2 d 5 record wav Note The default ALSA config file asound conf located under etc only supports stereo p...

Page 189: ...such as gstreamer plugins should be responsible for synchronization Input the following command in command line to start unit test mxc_tuner_test sh The following infomation will be output to console...

Page 190: ...Unit Test i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 190 Freescale Semiconductor Inc...

Page 191: ...o supported but with less performance see IC spec for more details Other output sampling rates in the range of 30 KHz to 100 KHz are also supported but with less performance Automatic accommodation to...

Page 192: ...RC driver implementation depends on the use cases in the platform Currently ASRC is used in following two scenarios Memory ASRC Memory ASRC is controlled by user application or ALSA plug in Memory ASR...

Page 193: ...AIR Start ASRC ASRC_START_CONV Write the raw audio data to be converted into the user maintained input buffer Fill asrc_convert_buffer struct with input output buffer length and address Driver would c...

Page 194: ...machine driver imx pcm dma mx2 c memroy to ASRC to ESAI TX implementation in 7 1 audio codec platform driver imx esai c memroy to ASRC to ESAI TX implementation in 7 1 audio codec cpu driver cs42888...

Page 195: ...input_sample_rate input sampling rate Input sample rate should be 5 512k 8k 11 025k 16k 22k 32k 44 1k 48k 64k 88 2k 96k 176 4k or 192k output_sample_rate output sampling rate Output sampling rate sho...

Page 196: ...to output_buffer_vaddr If the generated buffer size is smaller than user filled output_buffer_size with the difference of less than 64 bytes calling ASRC_CONVERT would fail input_buffer_vaddr virtual...

Page 197: ...the processor to receive and transmit digital audio The S PDIF transceiver allows the handling of both S PDIF channel status CS and User U data The frequency measurement block allows the S PDIF RX se...

Page 198: ...us and User Bits are also extracted from each frame and placed in the corresponding registers The S PDIF receiver provides a bypass option for direct transfer of the S PDIF input signal to the S PDIF...

Page 199: ...ta or compressed 24 bit data and the allowed sampling bit rates are from 16 to 96 KHz The driver provides the same interface for PCM and compressed data transmission 27 1 4 ASoC layer The ASoC layer d...

Page 200: ...status bits ciecset c 1 27 2 1 Driver Design Before S PDIF playback the configuration interrupt clock and channel registers are initialized During S PDIF playback the channel status bits are fixed The...

Page 201: ...4 and 96 KHz receiving sample rates Signed 24 bit little endian sample format Due to S PDIF SDMA feature each channel bit length in PCM recorded frame is 32 bits and only the 24 LSBs are valid In ALSA...

Page 202: ...D The mode is determined by the USyncMode bit 1 of CDText_Control register The user can call the sound control interface to set the mode see Table 27 1 but no matter what the mode is the driver handle...

Page 203: ...bit set to invalid 1 The mode column shows the interface attribute r read or w write 2 The sound control type of interface is called by the snd_ctl_xxx alsa lib function The user application can foll...

Page 204: ...tory Table 27 2 S PDIF Driver Files File Description sound soc codecs mxc_spdif c S PDIF ALSA SOC codec driver sound soc codecs mxc_spdif h S PDIF ALSA SOC codec driver header sound soc imx imx spdif...

Page 205: ...rt for IMX S PDIF 27 6 Platform Data struct mxc_spdif_platform_data is used to transfer board specific data to the S PDIF driver It is defined in include linux fsl_devices h spdif_tx is 1 if TX is sup...

Page 206: ...Transit driver on your PC Install WaveLab tools on your PC 27 8 1 Tx test step 1 Plug optical line into line optical port of M Audio transit NOTE Make sure that the optical out port of M Audio transit...

Page 207: ...v file on other audio card on the board or PC arecord D hw card id pcm id c 2 d 20 r sample rate in Hz f S24_LE record wav NOTE The sample rate argument in the arecord command must be consistent with...

Page 208: ...Unit Test Preparation i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 208 Freescale Semiconductor Inc...

Page 209: ...atible for frequencies up to 66 MHz The memory is organized as 8 192 pages of 512 bytes or 528 bytes The AT45DB321D also contains two SRAM buffers of 512 528 bytes each which allow receiving of data w...

Page 210: ...m for Linux is a generic interface to memory devices such as Flash and RAM providing simple read write and erase access to physical memory devices Devices called mtdblock devices can be mounted by JFF...

Page 211: ...n the screen displayed select Configure the kernel and exit When the next screen appears select the following options to enable the SPI NOR MTD driver accordingly CONFIG_MTD_M25P80 This config enables...

Page 212: ...Introduction i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 212 Freescale Semiconductor Inc...

Page 213: ...DMA data transfers Power management Supports 1 4 8 bit operations for MMC cards Support eMMC4 4 SDR and DDR modes Support SD3 0 SDR50 and SDR104 modes 29 1 1 Hardware Operation The MMC communication...

Page 214: ...steps are as follows 1 The uSDHC controller generates a DMA request whenever the amount of the buffer space exceeds the value set in the WR_WML register 2 Upon receiving this request the DMA engine s...

Page 215: ...rted by the platform esdhc_pltfm_get_ro gets the card read only status plt_8bit_width handles 8 bit mode switching on the platform plt_clk_ctrl handles clock management on the platform esdhc_prepare_t...

Page 216: ...y points to interface with the Linux MMC core driver MMC and SD cards SDIO cards SD3 0 cards Recognizes data transfer errors such as command time outs and CRC errors Power management It supports to be...

Page 217: ...ilable under Device Drivers MMC SD SDIO Card support By default this option is Y CONFIG_MMC_BLOCK builds support for MMC block device driver which can be used to mount the file system In menuconfig th...

Page 218: ...face support SDHCI support on the platform specific bus SDHCI platform support for the Freescale eSDHC i MX controller CONFIG_MMC_UNSAFE_RESUME is used for embedded systems which use a MMC SD SDIO car...

Page 219: ...ntroller Interface support SDHCI support on the platform specific bus SDHCI platform support for the Freescale eSDHC i MX controller 2 How to load and unload SDHCI module Due to dependency please load...

Page 220: ...modprobe r sdhci platform modprobe r sdhci Driver Features i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 220 Freescale Semiconductor Inc...

Page 221: ...or NOR Flash Reading or writing to NAND Flash must be done through the GPMI NAND Flash is a sequential access device appropriate for mass storage applications Code stored on NAND Flash can not be exe...

Page 222: ...mil_ecc_read_oob with ECC mil_ecc_write_oob with ECC These functions read the requested amount of data with or without error correction In the case of read the mil_incoming_buffer_dma_begin function...

Page 223: ...a pattern in the beginning of the spare area on each page of the block However if the chip uses hardware error correction the bad marks falls into the ECC bytes area Therefore if hardware error corre...

Page 224: ...y CONFIG_MTD_PARTITIONS y CONFIG_MTD_CHAR y CONFIG_MTD_BLOCK y In addition these UBI options must be enabled CONFIG_MTD_UBI y CONFIG_MTD_UBI_WL_THRESHOLD 4096 CONFIG_MTD_UBI_BEB_RESERVE 1 CONFIG_UBIF...

Page 225: ...inux kernel contains a core I2C module that is used by the chip driver to access the I2C bus driver to transfer data over the I2C bus The chip driver uses a standard kernel space API that is provided...

Page 226: ...o the device registers The camera driver uses the APIs provided by this driver to interact with the camera 31 1 3 Hardware Operation The I2C module provides the functionality of a standard I2C master...

Page 227: ...e signal is not received Because the I2C bus driver uses wait queues for its operation other device drivers should be careful not to call the I2C API methods from an interrupt mode 31 2 2 I2C Device D...

Page 228: ...ers I2C support I2C Hardware Bus support IMX I2C interface 31 3 3 Programming Interface The I2C device driver can use the standard SMBus interface to read and write the registers of the device connect...

Page 229: ...s 200 Kbps The best case values are based on a baud rate of 400 Kbps the maximum supported by the I2C interface Chapter 31 Inter IC I2C Driver i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4...

Page 230: ...Driver Features i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 230 Freescale Semiconductor Inc...

Page 231: ...terrupts than conventional serial communications Each ECSPI is equipped with a data FIFO and is a master slave configurable serial peripheral interface module allowing the processor to interface with...

Page 232: ...ple synchronous wrappers for those calls including the ones for common transaction types such as writing a command and then reading its response SPI NOR mtd driver Client 2 driver Client 3 driver SPI...

Page 233: ...elect and transfer The driver implements the following functions Init function spi_imx_init registers the device_driver structure Probe function spi_imx_probe performs initialization and registration...

Page 234: ...chronous Operation Figure below shows how the ECSPI provides synchronous read write operations Software Operation i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 234 Freescale Se...

Page 235: ...enable_rx_intr spi_load_TxFifo spi_init_exchange Rx_Data_Ready_intr spi_getRxData callback after transfer completion return Chapter 32 Enhanced Configurable Serial Peripheral Interface ECSPI Driver i...

Page 236: ...next screen appears select the following options to enable this module CONFIG_SPI build support for the SPI core In menuconfig this option is available under Device Drivers SPI Support CONFIG_BITBANG...

Page 237: ...audRate Transfer Length BaudRate TransferLength 1 Rxtl 31250 1500000 The typical values are based on a baud rate of 1 Mbps with a receiver trigger level Rxtl of 1 and a 32 bit transfer length The wors...

Page 238: ...Driver Features i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 238 Freescale Semiconductor Inc...

Page 239: ...ames are supported The maximum message buffer is 64 The driver is a network device driver of PF_CAN protocol family 33 1 1 Hardware Operation For the information on hardware operations see the i MX 6...

Page 240: ...upport for Broadcast Manager CAN protocol In menuconfig this option is available under Networking CAN bus subsystem support Broadcast Manager CAN Protocol with content filtering CONFIG_CAN_VCAN Build...

Page 241: ...effort MediaLB supports all the MOST Network data transport methods synchronous stream data asynchronous packet data and control message data MediaLB also supports an isochronous data transport metho...

Page 242: ...he MLB provides support for up to 16 logical channels and up to 31 physical channels with a maximum of 124 bytes of data per frame Each logical channel is referenced using an unique channel address an...

Page 243: ...ng buffering operation mode The supported frame rates are 256 512 and 1024Fs The MLB driver uses common read write interfaces to receive send packets and uses the ioctl interface to configure the MLB...

Page 244: ...figuring the buffer start and end pointer for the MLB module For reception the driver uses a ring buffer to buffer the received packet for read When a packet arrives the MLB module puts the received p...

Page 245: ...modes are supported Only one packet can be read or written at once The minimum read length must be greater or equal to the received packet length meanwhile the write length must be shorter than 1024B...

Page 246: ...TECT_CUR 34 3 Driver Files Table below lists the source file associated with the MLB driver that are found in the directory ltib_dir rpm BUILD linux drivers mxc mlb Table 34 1 MLB Driver Source File L...

Page 247: ...ce EHCI compliant This USB driver has the following features High speed OTG core supported Host mode Supports HID Human Interface Devices MSC Mass Storage Class Peripheral mode Supports MSC and CDC Co...

Page 248: ...ver which implements the USB protocols For the USB host it only implements the hardware specified initialization functions For the USB peripheral it implements the gadget framework static struct usb_e...

Page 249: ...of bytes to be moved with this transfer descriptor For OTG ID dynamic switch host device modes are supported Full OTG functions are temporarily not supported 35 2 2 Source Code Structure Table below s...

Page 250: ...rectory ltib_dir rpm BUILD linux arch arm mach mx6 Table 35 3 USB Platform Header Files File Description usb_dr c Platform related initialization usb_h1 c Platform related initialization usb_h2 c Plat...

Page 251: ...this option is available under Device drivers USB support EHCI HCD USB 2 0 support Support for DR host port on Freescale controller By default this option is Y CONFIG_USB_EHCI_ARC_HSIC Freescale HSIC...

Page 252: ...e with ID pin detection By default this option is Y CONFIG_MXC_OTG USB OTG pin detect support for Freescale USB OTG Controller By default this option is Y CONFIG_USB_ETH Build support for Ethernet gad...

Page 253: ...he wakeup functions depend on the USB PHY power supply including 1p1 2p5 3p3 no power supply all the wakeup function behavior will be unpredictable For host remote wake feature there is a limitation t...

Page 254: ...keup Host mode wakeup connect wakeup when USB device connects to host port Wakeup signal ID dm dp change echo enabled sys devices platform fsl usb2 otg power wakeup disconnect wakeup when USB device d...

Page 255: ...evice wakeup that device connects at second level hub 1 1 1 is the USB device name 35 3 4 How to Close the USB Child Device Power The following code string outlines how to close the USB child device p...

Page 256: ...System WakeUp i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 256 Freescale Semiconductor Inc...

Page 257: ...Generation I O Interconnect targeting low cost high volume multi platform interconnection usages It has the concepts with earlier PCI and PCI X and offers backwards compatibility for existing PCI sof...

Page 258: ...U and resources such as Memory RAM that can be shared across multiple PCIe nodes connected through a Root Complex Lane A set of differential signal pairs one pair for transmission and one pair for rec...

Page 259: ...component closer to the Root Complex http intellinuxwireless org n Info Any element of the fabric which is relatively closer towards RC is treated as Upstream All PCIe Endpoint ports including termin...

Page 260: ...f RC or a Switch is treated as a virtual PCI PCI bridge This means each port has a primary and secondary PCI bus and the downstream is mapped into the remote configuration space Root port associated v...

Page 261: ...omplete 36 2 Linux PCI Subsystem and RC driver In Linux the PCI implementation can roughly be divided into following main components PCI BIOS architecture specific Linux implementation Host Controller...

Page 262: ...es Hot Plug support if supported advanced error reporting support power management event support and virtual Channel support to run on PCI express ports if supported 36 2 1 RC driver source files The...

Page 263: ...ugh the DBI interface PCIe device configuration space Used to map the configuration spaces of PCIe EP devices that are inserted to the RC downstream port 36 3 1 System Resource Interrupt lines i MX 6...

Page 264: ...ver Symbol E1000E y Type tristate Prompt Intel R PRO 1000 PCI Express Gigabit Ethernet support Defined at drivers net Kconfig 2139 Depends on NETDEVICES y NETDEV_1000 y PCI y SPARC32 BROKEN n Location...

Page 265: ...030 Series Wi Fi Adapters Intel Wireless WiFi Link 6150BGN 2 Adapter Intel 100 Series Wi Fi Adapters 100BGN and 130BGN Intel 2000 Series Wi Fi Adapters WIFI firmware configurations In order to install...

Page 266: ...enlarge the WIFI signal strength if the WIFI card tests cannot work properly 36 5 i MX 6Quad SD PCIe RC EP Validation System 36 5 1 Hardware Setup There are two i MX 6Quad SABRE SD boards one is used...

Page 267: ...ommand line noinitrd console ttymxc0 115200 mem 768M root dev nfs nfsroot your_rootfs ip dhcp rw 36 5 4 Results When the ARM core is used as the bus master define EP_SELF_IO_TEST in pcie c driver Rega...

Page 268: ...6 3 Analyzer log for enabled cache When the cache is disable PCIe EP Starting data transfer PCIe EP Data transfer is successful tv_count1 149616us tv_count2 552099us PCIe EP Data write speed is 109 MB...

Page 269: ...Figure 36 4 Write Read log for disabled cache Chapter 36 i MX 6 PCI Express Root Complex Driver i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 Freescale Semiconductor Inc 269...

Page 270: ...i MX 6Quad SD PCIe RC EP Validation System i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 270 Freescale Semiconductor Inc...

Page 271: ...lision and CRC generation Obtaining statistics from the device such as transmit collisions The network adapter can be accessed through the ifconfig command with interface name ethx The driver auto pro...

Page 272: ...ronous clock reference REF_CLK can connect from PHY In FEC_RX_DV Receive Data Valid Receive Data Valid and generate CRS RXDV XOR RXERR on the falling edge of FEC_RX_CLK In FEC_RXD 0 Data in bit 0 Data...

Page 273: ...abled by the EIMR register When the receive frame is complete the FEC sets the L bit in the RxBD writes the other frame status bits into the RxBD and clears the E bit The Ethernet controller next gene...

Page 274: ...rmation about the generic Linux driver see the ltib_dir rpm BUILD linux drivers net fec c source file 37 2 3 Menu Configuration Options To get to the Linux kernel configuration option provided for thi...

Page 275: ...FEC_X_DES_ACTIVE 0x014 Transmit descriptor reg define FEC_ECNTRL 0x024 Ethernet control reg define FEC_MII_DATA 0x040 MII manage frame reg define FEC_MII_SPEED 0x044 MII speed control reg define FEC_...

Page 276: ...network devices i MX 6 user needs to provide MAC address by kernel command line so that user can use sb_loader to load kernel and run it without bootloader interaction Due to certain pin conflicts FE...

Page 277: ...It complies with the IXXAT stack interfaces To allow for IEEE 1588 or similar time synchronization protocol implementations the ENET MAC is combined with a time stamping module to support precise tim...

Page 278: ...AIL interrupt bit to know when the timestamp is available It then can read the timestamp from the TS_TIMESTAMP register This is done for all event frames other frames do not use the ff_tx_ts_frm indic...

Page 279: ...x Menu Configuration Options To get to the ENET 1588 configuration use the command ltib c when located in the ltib dir In the screen select Configure Kernel exit and a new screen appears The CONFIG_FE...

Page 280: ...32 dw_minDrift the max drift applying max compensation value in ppm u32 dw_maxDrift PTP default message type define DEFAULT_msg_Sync 0x0 define DEFAULT_msg_Delay_Req 0x1 define DEFAULT_msg_Peer_Delay_...

Page 281: ...current RTC time and returns the timestamp through the ptp_rtc_time structure Command PTP_FLUSH_TIMESTAMP Description command flushes the transmit and receive timestamp queues Command PTP_GET_ORIG_COM...

Page 282: ...Programming Interface i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 282 Freescale Semiconductor Inc...

Page 283: ...low control Serial communication using software flow control is reliable when communication speeds are not too high and the probability of buffer overruns is minimal CTS RTS hardware flow control both...

Page 284: ...r that manages many of the serial operations that are common across UART drivers for various platforms The low level UART driver is responsible for supplying information such as the UART port informat...

Page 285: ...e IOCTL calls If the user wishes to assert the CTS line then control is transferred back to the receiver as long as the driver has been configured to use hardware driven hardware flow control 39 2 2 D...

Page 286: ...the ltib c command when located in the ltib dir On the screen displayed select Configure the Kernel and exit When the next screen appears select the following options to enable this module CONFIG_SER...

Page 287: ...port The driver implements and provides a set of control methods to the Linux core UART driver For more information about the methods implemented in the driver see the API document 39 4 1 Interrupt R...

Page 288: ...Programming Interface i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 288 Freescale Semiconductor Inc...

Page 289: ...on mode supports 802 11 a b g n with HT20 on 2 4 5GHz and HT40 only on 5GHz Some of the other features include WPA WPA2 WPS WMM WMM PS and BT coexistence AP mode can be operated only in b g mode with...

Page 290: ...placement ath6k Once the mac80211 driver achieves feature parity with the ath6kl driver the ath6kl will be deprecated and removed from staging 40 1 3 Source Code Structure The AR6003 driver source fil...

Page 291: ...ile provides access to the file system on another device The SPP profile emulates a serial cable to provide a simply implemented wireless replacement for the existing RS 232 based serial communication...

Page 292: ...Introduction i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 292 Freescale Semiconductor Inc...

Page 293: ...me process The application and the BCHS protocol stack are running in two different processes In i MX platform the BCHS protocol stack runs in user space And the application runs in the same process a...

Page 294: ...and the Bluetooth chip The BCHS protocol opens dev ttymxc1 and configures the device according to profile requirements The minimum baud rate for the A2DP profile is 460 8 kbps 921 6 kbps baudrate is...

Page 295: ...o reset the whole bt module 41 2 3 Configuration To get to the Bluetooth configuration use the command ltib c when located in the ltib dir In the screen select Configure Kernel exit and a new screen w...

Page 296: ...Software Operation i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 296 Freescale Semiconductor Inc...

Page 297: ...PWM has 16 bit resolution and uses a 4x16 data FIFO to generate sound The software module is composed of a Linux driver that allows privileged users to control the backlight by the appropriate duty cy...

Page 298: ...processor interrupt handler The PWM includes a single external output signal PMWO The PWM includes the following internal signals Three clock inputs Four interrupt lines One hardware reset line Four...

Page 299: ...ry Function Description struct pwm_device pwm_request int pwm_id const char label Request a PWM device void pwm_free struct pwm_device pwm Free a PWM device int pwm_config struct pwm_device pwm int du...

Page 300: ...ion Options To get to the PWM driver use the command ltib c when located in the ltib dir On the screen displayed select Configure the kernel and exit When the next screen appears select the following...

Page 301: ...he WDOG times out Upon a time out the WDOG either asserts the wdog_b signal or a wdog_rst_b system reset signal depending on software configuration The watchdog module cannot be deactivated once it is...

Page 302: ...DOG subsystem 43 2 2 Menu Configuration Options To get to the Linux kernel configuration option provided for this module use the ltib c command when located in the ltib dir On the screen displayed sel...

Page 303: ...orted in the WDOG driver WDIOC_GETSUPPORT WDIOC_GETSTATUS WDIOC_GETBOOTSTATUS WDIOC_KEEPALIVE WDIOC_SETTIMEOUT WDIOC_GETTIMEOUT For detailed descriptions about these IOCTLs see ltib_dir rpm BUILD linu...

Page 304: ...Generic WDOG Driver i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 304 Freescale Semiconductor Inc...

Page 305: ...handlers kernel modules the kernel shared libraries and applications 44 1 2 Features OProfile has the following features Unobtrusive No special recompilations or wrapper libraries are necessary Even...

Page 306: ...converted into a tuple group or set of binary image offset The userspace tools can use this data to reconstruct where the code came from including the particular assembly instructions symbol and sourc...

Page 307: ...from userspace as well as the actual character device that the OProfile userspace receives samples from At setup time the architecture specific code may add further configuration files related to the...

Page 308: ...sample files load and process each one correlated against the relevant binary file and produce user readable information 44 3 Requirements OProfile has the following requirements Add Oprofile support...

Page 309: ...Profile system profiling EXPERIMENTAL 44 3 3 Programming Interface This driver implements all the methods required to configure and control PMU and L2 cache EVTMON counters More information see the Li...

Page 310: ...Requirements i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 310 Freescale Semiconductor Inc...

Page 311: ...gister page and writes global or system required configuration information a module that feeds jobs through job rings and reports status API Interface Level consists of An interface to the Scatterlist...

Page 312: ...uration includes a DPAA Queue Interface that interface has frame pop enabled NOTE i MX 6 configurations do not contain this logic If the instance contains a TRNG it s oscillator entropy configuration...

Page 313: ...when the job has completed processing areq Pointer to metadata or context data associated with this request Often this can contain referenced data mapping information that request postprocessing via t...

Page 314: ...ac sha1 cbcdes3_ede caam Single pass authentication encryption using SHA1 and Triple DES CBC authenc hmac sha224 cbc des3_ede authenc hmac sha224 cbcdes3_ede caam Single pass authentication encryption...

Page 315: ...e sha1 sha1 caam SHA1 160 Hash Computation sha224 sha224 caam SHA224 Hash Computation sha256 sha256 caam SHA256 Hash Computation sha384 sha384 caam SHA384 Hash Computation sha512 sha512 caam SHA512 Ha...

Page 316: ...the range of 2 9 allowing selection of a ring depth ranging from 4 to 512 entries The default selection is 9 resulting in a ring depth of 512 job entries CRYPTO_DEV_FSL_CAAM_INTC Enables the use of th...

Page 317: ...e that the CAAM RNG driver is operating and buffering random data 45 7 Limitations Components of the driver do not currently build and run as modules This may be rectified in a future version Interdep...

Page 318: ...visible to the outside This driver with it s kernel level API exposes a basic interface to allow kernel level services access to secure memory functionality It is split into two pieces Keystore Initia...

Page 319: ...ted unit that can be used for the storage of keys or other secrets The unit will be divided into a series of fixed size slots each one of which is marked available in the allocation table The size of...

Page 320: ...the Keystore Allocate a slot from the keystore for use in all other subsequent operations by the keystore access interface int sm_keystore_slot_alloc struct device dev u32 unit u32 size u32 slot Argum...

Page 321: ...into a keystore slot as a Secure Memory Blob int sm_keystore_slot_encapsulate struct device dev u32 unit u32 inslot u32 outslot u16 secretlen u8 keymod u16 keymodlen Arguments dev Points to a struct...

Page 322: ...secretlen u8 keymod u16 keymodlen Arguments dev Points to a struct device established to manage resourcesfor the secure memory subsystem unit One of the units detected with a call to sm_detect_keystor...

Page 323: ...Zero for successful completion EFBIG if the requested size exceeds that which the slot can hold 45 18 Release a Slot back to the Keystore Release a keystore slot back to the available pool Informatio...

Page 324: ...e API while verifying it s functionality The test module works along this flow Creates a number of known clear keys 3 sizes Allocated secure memory slots Inserts those keys into secure memory slots an...

Page 325: ...e continuous monitoring of a number of possible attack vectors in a running system If the occurrence of one of these attach vectors is sensed e g a Security Violation has been detected SNVS can along...

Page 326: ...m secvio_cause cause void handler struct device dev u32 cause void ext u8 cause_description void ext Arguments dev Points to SNVS owning device cause Interrupt source cause from the above list of enum...

Page 327: ...VS CRYPTO_DEV_FSL_CAAM_SECVIO Enables inclusion of Security Violation driver and configuration interface as part of the build configuration Note that the driver is not buildable as a module in its pre...

Page 328: ...Driver Configuration CAAM SNVS i MX 6Solo 6DualLite Linux Reference Manual Rev L3 0 35_4 1 0 09 2013 328 Freescale Semiconductor Inc...

Page 329: ...on consequential or incidental damages Typical parameters that may be provided in Freescale data sheets and or specifications can and do vary in different applications and actual performance may vary...

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