• Supporting 0-3 virtual channels.
• Supporting the following date types:
• RGB formats: RGB888, RGB666, RGB565, RGB555, RGB444
• YUV formats: YUV422 8bit, YUV422 10bit, YUV420 8bit, YUV420 10bit
• RAW data: RAW6, RAW7, RAW8, RAW10, RAW12, RAW14
17.1.2 Hardware Operation
There are four blocks in the MIPI CSI-2 D-PHY: PHY adaptation layer, packet analyzer,
image date interface, and register bank.
Functions and operations are listed as follows:
• PHY Adaptation Layer is responsible for managing the D-PHY interface, including
PHY error handling.
• Packet Analyzer is responsible for data lane merging if required, together with
header decoding, error detection and correction, frame size error detection and CRC
error detection.
• Image Date Interface separates CSI-2 packet header information and reorders data
according to memory storage format. It also generates timing accurate video
synchronization signals. Several error detections are also performed at frame level
and line level.
• Register Bank is accessible through a standard AMBA-APB slave interface and
provides access to the CSI-2 Host Controller register for configuration and control.
There is also a fully programmable interrupt generator to inform the system upon
certain events.
17.2 Software Operation
MIPI CSI2 driver for Linux has two parts:
• MIPI CSI2 driver: initializes the mipi_csi2_info structure
• MIPI CSI2 common APIs: exports APIs for the CSI module driver and mipi sensor
driver
17.2.1 MIPI CSI2 Driver Initialize Operation
The steps for MIPI CSI2 driver initialization are as follows:
Software Operation
i.MX 6Solo/6DualLite Linux Reference Manual, Rev. L3.0.35_4.1.0, 09/2013
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Freescale Semiconductor, Inc.
