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NOTE
The -D parameter of the arecord indicates the PCM device
with card ID and PCM device ID: hw:[card id],[pcm device
id]
The "iecset" utility provides a common method to set or dump the IEC958 status bits.
#iecset -c 1
27.3.1 Driver Design
Before the driver can read a data frame from the S/PDIF receiver FIFO, it must wait for
the internal DPLL to be locked. By using the high speed system clock, the internal DPLL
can extract the bit clock (advanced pulse) from the input bit stream. When this internal
DPLL is locked, the LOCK bit of PhaseConfig Register is set and the driver configures
the interrupt, clock and SDMA channel. After that, the driver can receive audio data,
channel status, user bits and valid bits concurrently.
For channel status reception, a total of 48 channel status bits are received in two registers.
The driver reads them out when a user application makes a request.
For user bits reception, there are two modes for User Channel reception: CD and non-CD.
The mode is determined by the USyncMode (bit 1 of CDText_Control register). The user
can call the sound control interface to set the mode (see
), but no matter what
the mode is, the driver handles the user bits in the same way. For the S/PDIF Rx, the
hardware block copies the Q bits from the user bits to the QChannel registers and puts the
user bits in UChannel registers. The driver allocates two queue buffers for both U bits
and Q bits. The U bits queue buffer is 96x2 bytes in size, the Q bits queue buffer is 12x2
bytes in size, and queue buffers are filled in the U/Q Full, Err and Sync interrupt
handlers. This means that the user can get the previous ready U/Q bits while S/PDIF
driver is reading new U/Q bits.
For valid bit reception, S/PDIF Rx hardware block triggers an interrupt and set interrupt
status upon reception. A sound control interface is provided for the user to get the status
of this valid bit.
27.3.2 Provided User Interfaces
The S/PDIF Rx driver provides interfaces for user application as shown in table below.
S/PDIF Rx Driver
i.MX 6Solo/6DualLite Linux Reference Manual, Rev. L3.0.35_4.1.0, 09/2013
202
Freescale Semiconductor, Inc.