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Epson Research and Development
Vancouver Design Center
SED1352
Programming Notes and Examples
X16-BG-007-04
Issue Date: 98/10/08
--val;
WriteRegister(4, val & 0xff); // Write to Total Display Line Count Reg
WriteRegister(0x0a, val & 0xff); // Write to Screen 1 Display Line Count Reg
WriteRegister(5, (val >> 8) & 0x03); // Total Disp Line Cnt (MSB)/WF Count Reg
WriteRegister(0x0b, (val >> 8) & 0x03); // Scrn 1 Disp Line Count Reg (MSB)
//--------------------------------------
//
// Set Screen 1 Display Start Address to beginning of video memory
//
WriteRegister(6, 0); // Write to Screen 1 Display Start Address Register
WriteRegister(7, 0);
//--------------------------------------
//
// Screen 2 Display Start Address Register
//
// If using a dual panel, the Screen 2 Display Start Address must point
// to the second half of the image in video memory.
//
if (PanelType == TYPE_DUAL)
{
val = (unsigned int) ((ReadRegister(3) & 0x01) << 8) | ReadRegister(2);
++val;
val *= (PanelY / 2);
WriteRegister(8, val & 0xff);
WriteRegister(9, val >> 8);
}
else
{
//
// On a single panel, Screen 1 was programmed to show all of its
// lines. Consequently Screen 2 will not be seen, and so the
// Screen 2 Display Start Address will have no observable effect.
// For convenience, set the screen 2 address to 0.
//
WriteRegister(8, 0);
WriteRegister(9, 0);
}
//--------------------------------------
//
// When the SDU1352B0x is set to 64k, video memory exists from
// D000:0000 to D000:FFFF. When the SDU1352B0x is set to 128k, video
// memory exists from C000:0000 to D000:FFFF. As far as the SED1352
// is concerned, video memory ALWAYS begins at C000:0000, even if
// there is no physical memory present.
//