Epson S1C6200, Core Cpu Manual

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Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
MSB LSB
MSB LSB
C –
Z –
D –
I –
C –
Z –
D –
I –
S1C6200/6200A CORE CPU MANUAL
EPSON
71
3 INSTRUCTION SET
PUSH YL
Push YL onto stack
PUSH YL
SP'
←
SP - 1, M(SP')
←
YL
1 1 1 1 1 1 0 0 1 0 0 1 FC9H
VI
5
Not affected
Not affected
Not affected
Not affected
Decrements the stack pointer by 1 and loads the contents of YL, the four low-order
bits of YHL, into the data memory location addressed by SP.
PUSH YL
SP D0 CF
Memory (CFH) 0001 0111
YL register 0111 0111
PUSH YP
Push YP onto stack
PUSH YP
SP'
←
SP - 1, M(SP')
←
YP
1 1 1 1 1 1 0 0 0 1 1 1 FC7H
VI
5
Not affected
Not affected
Not affected
Not affected
Decrements the stack pointer by 1 and loads the contents of YP, the page part of
IY, into the data memory location addressed by SP.
PUSH YP
SP C0 BF
Memory (BFH) 1111 0000
YP register 0000 0000
2
3
2
2
2
1
2
0
M(SP) =
= YL
2
0
2 1
2
2
2 3
2 3 2 2 2 1 2 0
M(SP) =
= YP
2 0
2
1
2 2
2
3