Cache
16KB of internal cache in the processor;
256KB of external cache installed on
system board with two pipelined burst
SRAM chips; internal and external cache
controllable through SETUP
Math
Math coprocessor built into the 586-class
coprocessor
processor
Clock/
calendar
Real-time clock, calendar, and CMOS
RAM socketed on system board with
integrated backup battery
Controllers
PCI chipset
Provides PCI caching, memory, and
control for the PCI bus and the two-
channel, bus-mastered, PCI IDE interface
(described under “Hard disk and other
IDE devices” below); integrated PCI
bridge translates CPU bus cycles to PCI
bus cycles and CPU-to-PCI memory write
cycles to PCI burst cycles
Video
S3™ ™ PCI VGA controller with
integrated 24-bit RAMDAC, 64-bit DRAM
interface; includes power-saving and
multimedia features; supports MPEG
video playback; supports resolutions up to
1280 x 1024 in 16 colors with 1MB of video
RAM, increasing to 256 colors with 2MB
of video RAM; True Color’” support at
640 x 480 resolution, and Hi-Color support
at 800 x 600 resolution
Specifications A-3
