44
:01 06 00 40 FD 00 Check CR LF Eco
.
- CT primary
= 1000 exp 0 = 1000 A
- CT secondary
= 1000 exp –3 = 1.000 V
- CT K
= 1000 / 1 = 1000 A. / 1 V
- Writing in eeprom of the PT coefficient K
(2 consecutive writing commands)
-1) SSSS = 0030H:
- D1 = PT primary in volts (in BCD) (middle 2 digits)
- D2 = PT primary in volts (in BCD) (first 2 digits)
-2) SSSS = 002FH:
- D1 = PT primary in volts (in BCD) (last 2 digits)
- D2 = PT secondary (in binary) (actually written in 0035H)
- 00H = 57,7 volts
- 10H = 63,5 volts
- 20H = 100 volts
- 30H = 110 volts
- 40H = 115 volts
- 50H = 120 volts
- 60H = 173 volts
- 70H = 190 volts
- 80H = 200 volts
- 90H = 220 volts
NOTE: Only the high nibble of datum D2 is written.
NOTE: If for any reason only one of the two writing commands is written (because of a break in the line, etc.) the
malfunction must be recorded (on P.C.) since after each command the PT primary and secondary are immediately
updated. This might lead to a lack of synchronization between the primary/secondary values set and the PT coefficient K
implemented (not updated until after the second command). Also remember that whenever the PT primary is greater than
9999 V the value is rounded up or down for calculation of the K, since the internal precision is of 4 digits (the most
significant).
E.g.
- PT primary
= 100050 V
- PT secondary
= 100 V
- PT K
= 100100 / 100 = 1001 V.
- Writing in eeprom of the flag for selection of Start/Delta system
(SSSS = 0001H; D2 = 09H):
Structure of datum "D1":
7
6
5
4
3
2
1
0
bit
-
-
-
-
0
-
-
0
==> Star
-
-
-
-
0
-
-
1
==> Delta
(any others not used)
NOTE: Only bits 3 and 0 of datum D1 are written at the address indicated; D2 is processed as a template of the bits to be
written but is not written.
- Writing in eeprom of the flag for selection of Standard 1/Standard 2/Cogeneration 4
(2 consecutive writing commands)
-1) SSSS = 0001H; D2 = 02H:
Structure of datum "D1":
7
6
5
4
3
2
1
0
bit
-
-
-
-
-
-
0
-
==> no cogeneration
(standard 1/2)
-
-
-
-
-
-
1
-
==> cog. 4 (Wh, VArh,
-Wh, -VArh).
NOTE: Only bit 1 of datum D1 is written at the address indicated; D2 is processed as a template of the bit to be written
but is not written.
-2) SSSS = 00CDH; D2 = 80H:
Structure of datum "D1":
7
6
5
4
3
2
1
0
bit
0
-
-
-
-
-
-
-
==> Standard 1 (Wh, VArh)
1
-
-
-
-
-
-
-
==> Standard 2 (Wh, VAh).
