Dynamic Engineering PMC-BiSerial-III HW2, User Manual

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Embedded Solutions
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List of Figures
FIGURE 1
PMC BISERIAL-III BASE BLOCK DIAGRAM 6
FIGURE 2 PMC BISERIAL-III-HW2 P2P BLOCK DIAGRAM 7
FIGURE 3 PMC BISERIAL-III-HW2 SDLC BLOCK DIAGRAM 8
FIGURE 4 PMC BISERIAL-III-HW2 ASYNC BLOCK DIAGRAM 9
FIGURE 5 PMC BISERIAL III HW2 MANCHESTER TIMING DIAGRAM 12
FIGURE 6 PMC BISERIAL-II I-HW2 INTERNAL ADDRESS MAP 15
FIGURE 7 PMC BISERIAL-III BASE CONTROL REGISTER BIT MAP 17
FIGURE 8 PMC BISERIAL-III DESIGN ID REGISTER BIT MAP 18
FIGURE 9 PMC BISERIAL-III START SET REGISTER 18
FIGURE 10 PMC BISERIAL-III START CLEAR REGISTER 19
FIGURE 11 PMC BISERIAL-III PARALLEL OUTPUT DATA BIT MAP 20
FIGURE 12 PMC BISERIAL-III DIRECTION CONTROL PORT 20
FIGURE 13 PMC BISERIAL-III TERMINATION CONTROL PORT 21
FIGURE 14 PMC BISERIAL-III MUX CONTROL PORT 21
FIGURE 15 PMC BISERIAL-III UPPER CONTROL PORT 22
FIGURE 16 PMC BISERIAL-III I/O READBACK PORT 22
FIGURE 17 PMC BISERIAL-III I/O READBACK PORT 23
FIGURE 18 PMC BISERIAL-III SWITCH PORT 23
FIGURE 19 PMC BISERIAL-III PLL CONTROL 24
FIGURE 20 PMC BISERIAL-III STATE MACHINE CONTROL REGISTERS 25
FIGURE 21 PMC BISERIAL-III SDLC CONTROL REGISTERS 28
FIGURE 22 PMC BISERIAL-III SDLC CONTROL REGISTERS 30
FIGURE 23 PMC BISERIAL-III CHANNEL MODE CONTROL REGISTER 32
FIGURE 24 PMC BISERIAL-III INTERRUPT STATUS REGISTER 33
FIGURE 25 PMC BISERIAL-III I2O ADDRESS REGISTER 33
FIGURE 26 PMC BISERIAL-III PN1 INTERFACE 42
FIGURE 27 PMC BISERIAL-III PN2 INTERFACE 43
FIGURE 28 PMC BISERIAL-III FRONT PANEL INTERFACE 44